5 GHz Phase-Locked Loop With a Phase-Adjusting Function
- 16 January 2023
- journal article
- research article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Microwave and Wireless Technology Letters
- Vol. 33 (5) , 583-586
Abstract
The design of a 5 GHz phase-locked loop (PLL) with a phase-adjusting function is presented. The voltage-controlled delay line (VCDL) is proposed to adjust the feedback signal phase by an externally controlled voltage. The output phase difference of multi-PLLs can be shifted from 0 $^{\circ}$ to 98.6 $^{\circ}$ , when the propagation delay of VCDL is 0.41 and 4.75 ns, respectively. The proposed PLL was fabricated in TSMC 0.18- $\mu $ m CMOS process and supplied at 1.8 V with a power dissipation of 16.38 mW. The locking time is less than 2 $\mu $ s under the different controlled-voltage ranges of VCDL.Keywords
Funding Information
- Ministry of Science and Technology (MOST 110-2221-E-155-063)
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