Mohamed Hussein Eissa

This work presents a two-way J-band power amplifier (PA) with a flat gain response and high saturated output power (P$_\rm{sat}$). The PA is manufactured in an advanced 130 nm BiCMOS technology from IHP with experimental $f_{T}$ and $f_{max}$ of 470 GHz and 650 GHz, respectively. The PA is designed to achieve state-of-the-art P$_\rm{sat}$ and collector efficiency ($\eta _{c}$) across a wide bandwidth while maintaining a flat gain response. The design methodology to achieve these goals is presented. The PA consists of 3-cascaded amplification stages with gain staggered inter-stage matching. The distribution and combining passives also serve as the matching networks for the amplification stages. The fabricated power amplifier was measured demonstrating a maximum collector efficiency of 5.5% at a saturated output power of 15.5 dBm. These results were achieved with a small-signal gain of 20 dB, a flat gain response of $\pm$0.6 dB from 255 GHz to 315 GHz. With 0.16 mm$^\rm{2}$ of occupied silicon area, this design is well suited for J-band transmitting arrays for communication and sensing applications.

Low-power modulator circuits are essential in energy-efficient mm-wave transceiver frontend circuits, yet the associated high RF losses require additional power-consuming buffer stages. In this letter, a wideband and low-loss balanced bi-phase amplitude modulator (BPAM) topology is presented based on the Gilbert-core; however, the transconductance stage is removed, and the switching quad transistors are operated in the deep-saturated region with zero collector–emitter voltage consuming 0.3 mW. The control over the amplitude is obtained with a biasing circuit based on Schottky diodes. The proposed modulator is realized in an advanced SiGe BiCMOS technology and achieves an insertion loss of only 2.9 dB at 60 GHz. From 30 GHz to the measurement limit of 62 GHz, binary phase shift keying (BPSK) modulation with a data rate of $\mathrm {0.5~{\text {Gbit/s} }}$ is supported with 32 dB of measured EVM, demonstrating promising performance for future integrated sensing and communication applications. Other key parameters, including 58 GHz of 3-dB bandwidth and 48 dB of on–off isolation, showcase the excellent performance compared to the results in literature.

This article presents a 220-260 GHz fully integrated phased-array wireless system featuring direct conversion RF beam-forming. The system is constructed using fully integrated transmitter (Tx) and receiver (Rx) chips with on-chip antenna array. A 4-channel Tx and Rx are designed and fabricated in a 130 nm SiGe BiCMOS process with f$_{\mathbf{T}}$ / f$_{\mathbf{max}}$ = 300 / 500 GHz. A modular design approach enables the chips as building units for 2×N phased arrays and multiple-input multiple-output (MIMO) systems. A comprehensive design approach for the Tx and Rx chips focusing on key design decisions is presented in this work. The transmitter is equipped with a local oscillator (LO) multiplication chain, IQ up $-$ conversion mixer, active RF splitting network, vector modulator phase shifter (VMPS), temperature sensors, and high output power amplifiers (PA). The PA with power $-$ combining boost the effective isotropic radiated power (EIRP) and reduces the need for external lenses. The receiver is equipped with an LO chain, IQ down $-$ conversion mixer, active RF combining network, VMPS, and low noise amplifiers (LNA). In both Tx and Rx the antenna array is composed of four differential double-folded dipole antennas with local backside etching (LBE). The Tx and Rx chips consume 4.4 W and 1.84 W of power respectively from a 3.5 V supply while each occupying 25 mm $^\rm{2}$ of silicon area. With a measured Tx array effective isotropic radiated power (EIRP) of 24 dBm, a beamforming wireless link is demonstrated supporting up to 50 Gbps of data rates across 85 cm of link distance with no need for focusing lenses and $\pm 30^\circ$ of scanning capability. With these capabilities, the presented modular chips enable future scaling for 2× N antenna arrays for sensing and communication applications.

This work presents a low phase error (PE) and amplitude error (AE) vector modulator phase shifter (VMPS) in the $J$ -band. The influence of the IQ crosstalk RF impairment on the performance is analyzed for different vector summation implementations, guiding to the VMPS architecture choice and design optimization. The chosen architecture consists of an IQ analog-controlled voltage-gain amplifier (IQ-VGA), Branchline coupler, and a Wilkinson combiner. Test structures for the variable-gain amplifier (VGA) and the VMPS are manufactured and measured in a 130-nm BiCMOS technology ( $f$ $_{T}$ / $f$ $_\textbf{max}$ $=$ 300/500 GHz). For the phase resolution of 11.25 $^\circ$ , the VMPS achieves an average rms PE and AE of 1.2 $^\circ$ and 0.35 dB, respectively, with equivalent to 5.5 -bits control voltage across the frequency band 220–260 GHz. The VMPS consumes 60 mW from 2.5-V supply and occupies 0.2 mm $^2$ of silicon area. This work presents the least PE and AE across a wide bandwidth for VMPS in silicon technologies above 200 GHz, which is crucial for large-scale beam-steering arrays.

This work presents a wideband passive variable voltage-controlled attenuator (VVA) to control signal powers in the $J$ -band. The VVA is manufactured in a 130-nm BiCMOS technology with f $_\textbf{T}$ / f $_\textbf{max}$ $=$ 300 / 500 GHz. The design is based on a distributed T-attenuator architecture. The design methodology aimed to achieve a wide bandwidth (BW) across attenuation states while maintaining low minimum insertion loss (IL) in compact silicon area. Hence, a distributed inductor-based approach is followed rather than the series varistors or transmission line architectures. The VVA is capable of handling P $_\textbf{in}$ up to 18 dBm with a compression of 0.5 dB. A minimum IL of 5.5 dB was measured within a 3-dB BW of 60 GHz (200–260 GHz) across 13 dB of the voltage-controlled attenuation range. The core circuit occupies 0.015 mm $^2$ of silicon area. To the best of the authors’ knowledge, this is the first presented VVA at this frequency range suiting very well highly linear wideband VGAs for sub-THz transmitters (TXs).

Energy-efficient, low-voltage, and low-power millimeter-wave (mm-wave) radars are gaining increasing attention for battery-powered commercial applications. In this article, the design of a low-power V -band radar sensor based on a transceiver (TRX) front-end chip using 1.5 V supply in an advanced SiGe BiCMOS technology with 300 GHz $\textit{f}\textsubscript{T}$ and 500 GHz $\textit{f}\textsubscript{max}$ is presented. The monostatic front-end chip utilizes low-voltage low-power circuit-level design techniques to achieve measured 9-dBm transmitter (TX) output power and 27-dB receiver (RX) gain with a simulated 3.8-dB noise figure (NF) consuming a total of only 72 mW in continuous mode. The TRX chip is used to build a radar sensor, which is experimentally verified in an anechoic chamber. The low-power sensor achieves a 46-dB dynamic range and a ranging precision better than 3.4 $\mu$ m measured with a static target at 1 m. Phase measurements using the low-power radar in the continuous-wave (CW) mode demonstrate that submillimeter movements can be tracked, and notably main vital parameters of a human can be determined accurately. Experimental results show that the performance of the proposed low-power TRX front-end chip is very competitive with designs in modern CMOS technologies.

The capability to sense the dielectric properties of liquids and tissues is valuable in many applications, because accurate assessment of the material composition can be made from the complex permittivity measurements. Laboratory-on-chip systems for continuous dielectric monitoring impose low-voltage and low-power operation on the circuits to enable long-term use without battery replacement. In addition, high level of integration is necessary to facilitate the implementation of 2-D sensor arrays. This letter presents the design and characterization of a SiGe BiCMOS capacitive sensing oscillator-based complex dielectric sensor chip at Ka -band operating with a supply voltage of 1.2 and consuming 27 . The chip is integrated with readout circuits to provide simple dc outputs for easier processing and with reference circuits to serve as a tool to compensate for both the external and internal variations, which affect the sensor output. The experimental results show that different alcohols can be differentiated using the proposed sensor chip.

This article proposes a fully integrated single-channel bistatic frequency-modulated continuous-wave (FMCW) radar transceiver (TRX) that operates at a center frequency of 256 GHz. The main focus of this work is to realize a wideband and efficient radar TRX that offers high resolution of target detection in the short-range FMCW radar sensing application. The radar TRX chip is designed and manufactured using the 130 nm silicon – germanium (SiGe) bipolar complementary metal-oxide-semiconductor (BiCMOS) technology which offers heterojunction bipolar transistors (HBTs) with $f_\mathbf{T}/f_\mathbf{MAX}$ of 300/500 GHz. The transmitter (TX) of the radar TRX is based on a fundamentally operated multiplier-by-8 chain architecture that offers a 3-dB bandwidth of around 65 GHz with a saturated output power of -5.4 dBm. On the other hand, the receiver (RX) is based on a subharmonic architecture that provides a conversion gain (CG) of 10.4 dB with an average noise figure (NF) of 23.5 dB. This TRX is realized with two integrated on-chip folded dipole antennas. The antenna offers high antenna gain and radiation efficiency due to the use of the selective localized backside etching (LBE) technique. This chip consumes 305 mW of power from a 3.3-V supply and occupies a silicon area of 3.3 mm $^2$ . The radar range measurement is performed in an anechoic chamber, and it shows the maximum dynamic range (DR) of around 34 dB at 1-m range of the target.

This paper presents a transmitter (TX) and a receiver (RX) with a cross-polarized bowtie-antenna on a silicon lens for gas spectroscopy at 222–270 GHz and the doubled frequency at 444–540 GHz. TX and RX are fabricated in 0.13 μm SiGe BiCMOS technology. Both use two integrated local oscillators for frequency subbands 222–256 GHz and 250–270 GHz, which allow operating in one branch of the TX and RX at 222–270 GHz and in a second branch of the TX and RX at 444–540 GHz by frequency doubling. The directivity of the cross-polarized bowtie-antenna of the TX and RX is optimized for these two frequency bands with an estimated value of 24.4 dBi at 260 GHz, and 29.5 dBi at 520 GHz. Absorption spectroscopy of gaseous methanol is used as a measure for the performance of the TX and RX in the lower and upper frequency bands.