220–320-GHz J-Band 4-Way Power Amplifier in Advanced 130-nm BiCMOS Technology

A power combined wideband power amplifier (PA) covering the $J$ -band (220–320 GHz) is presented in 130-nm BiCMOS technology. The input power is split by two cascaded 1-to-2 power splitters with amplification stages in-between. The four split signals drive four output stages, which have their outputs combined within a 4-way zero-degree combiner. The splitting and combining networks also incorporate impedance matching. After de-embedding the I/O pads and baluns of 2 dB loss at each side, the PA achieves a gain of 20 dB at the middle of the band and a minimum gain of 17 dB at 320 GHz with I/O return losses below $-$ 5 dB. The PA records a saturated output power ranging from 9.5 to 14.5 dBm across the $J$ -band. It consumes 710 mW from a 3 V supply which corresponds to a drain efficiency ( $\eta_d$ ) of 3.15% at 270 GHz. The presented PA achieves twice better bandwidth with 1.5 times better $\eta_d$ than the state-of-the-art silicon-based amplifiers above 200 GHz. To the authors’ knowledge, this is the first PA covering the whole $J$ -band in silicon technologies.