Maciej Kucharski

This article presents G-band monostatic and bistatic radar transceivers (TRX) incorporating on-chip antennas for short-range high-precision applications. The circuits were fabricated using a silicon-germanium (SiGe) BiCMOS technology offering heterojunction bipolar transistors (HBTs) with fT/fMAX of 300/500 GHz. The monostatic TRX implements a tunable leakage canceller (LC) for enhanced transmitter (TX)-to-receiver (RX) leakage compensation and hence improved detectability of weakly reflecting near targets. A standalone monostatic TRX characterized at on-wafer level achieves 4-dBm maximum output power (PTX) and 19-dB peak conversion gain (GRX) with 3-dB bandwidths of 18 and 17,GHz for the TX and the RX, respectively. The bistatic version reaches PTX of 13 dBm and GRX of 24 dB expanding the 3-dB bandwidths to 32 and 34 GHz for the TX and RX, respectively. A double-folded dipole antenna providing 5-dBi gain at 170 GHz was implemented using localized backside etching (LBE) and integrated with the transceivers. A frequency-modulated continuous-wave (FMCW) radar demonstrator incorporating an external phase-locked loop (PLL) was built to evaluate both TRXs and tunable leakage cancellation feature available in the monostatic variant. The maximum equivalent isotropic radiated power (EIRP), including on-chip antennas, is 8 and 18 dBm for the monostatic and bistatic TRX, respectively. The radars support sweep bandwidth up to 20 GHz reaching 2.1 cm spatial resolution. For a target at 1 m distance the measured ranging precision is 105 μm and 13 μm for monostatic and bistatic TRX, accordingly. Activation of leakage cancellation effectively suppresses close-in noise and extends the minimum detectable range remarkably.

This article demonstrates the implementation of 80- and 160-GHz four-channel radar sensors employing the modular scalable platform based on a single relaxed 40-GHz local oscillator and cascadable transceiver chips. The first two channels synthesize 2 x 2 multiple-input-multiple-output (MIMO) radar at 80 GHz with onboard 8 x 1 patch arrays for enhanced angular resolution, whereas the other two channels employ 160-GHz system-on-chip transceivers with integrated wideband 6-dBi micromachined on-chip antennas for enhanced range resolution. Configurable modulators in each transceiver offer ranging, direction-of-arrival (DoA) estimation, velocity/vibrations measurement, and data communication applications. Frequency-modulated continuous wave (FMCW) is demonstrated with 4-/8-GHz sweep bandwidth at 80/160 GHz corresponding to 3.75-/1.875-cm range resolution. Chirp-sequence FMCW is employed to measure the heartbeat rate of a human, and 78 bpm is measured with 0.06-Hz Doppler resolution. Mechanical vibration rate from a loudspeaker is measured using the CW radar technique, whereas phase-modulated continuous wave is employed for distant selective vibrations measurement. Time-division multiplexing MIMO radar is configured at 80 GHz in a multitarget scenario for DoA estimation, and the targets are distinguished with 25° effective angular resolution. Frequency-division multiplexing MIMO radar technique is demonstrated based on Δ Σ-modulation and binary phase shift keying (BPSK) modulators. Furthermore, the 10-Mb/s BPSK data communication link is evaluated at 80 GHz with a 20-dB signal-to-noise ratio at 1 m. The 160-GHz vector modulators offer additional modulations.

This article presents two broadband frequency multiplier chains (FMCs) fabricated with a standard 130-nm SiGe BiCMOS process. In both solutions, a broadband push-push frequency doubler (x2) operating at 220-360 GHz was employed. In order to properly drive such a doubler, with sufficient input power and bandwidth, two different power amplifiers (PAs) have been adopted: the former is based on a cascode configuration and the latter is based on a stacked topology. In addition, a D-band frequency quadrupler (x4) has been integrated before the PAs and doubler, to complete the design of frequency eighth tupler (x8) chains. The first FMC with the cascode PA achieves peak output power of 2.3 dBm, with maximum conversion gain (GC) and bandwidth of 15 dB and 127 GHz, respectively. The second FMC with the stacked PA delivers a saturated output power of 2.5 dBm, with a maximum GC and a bandwidth of 12 dB and 72 GHz, respectively. The two FMCs consume maximum dc power of 0.537 and 0.542 W. The complete design procedure of the FMCs is presented in this article. To the best of our knowledge, the reported bandwidth is state-of-the-art and widest among SiGe based FMCs.

This letter demonstrates different planar highly efficient on-chip antennas at 165 GHz with high gain utilizing a standard Silicon-Germanium (SiGe) BiCMOS process with a localized backside etching (LBE) feature that allows cutting air trenches in the silicon. Dipole antenna, folded dipole antenna with air trenches around the radiator, and single-ended patch antenna with air trenches at the radiating edges are designed, fabricated and characterized in the D-band (110-170 GHz). The geometry of each individual antenna and the LBE air trenches are optimized to meet both process reliability specifications and radiation performance simultaneously. Metal fillings effects on the radiation pattern and matching are also studied.

This paper presents a scalable E-band radar platform based on single-channel fully integrated transceivers (TRX) manufactured using 130-nm silicon-germanium (SiGe) BiCMOS technology. The TRX is suitable for flexible radar systems exploiting massive multiple-input-multiple-output (MIMO) techniques for multidimensional sensing. A fully integrated fractional-N phase-locked loop (PLL) comprising a 39.5-GHz voltage-controlled oscillator is used to generate wideband frequency-modulated continuous-wave (FMCW) chirp for E-band radar front ends. The TRX is equipped with a vector modulator (VM) for high-speed carrier modulation and beam-forming techniques. A single TRX achieves 19.2-dBm maximum output power and 27.5-dB total conversion gain with input-referred 1-dB compression point of -10 dBm. It consumes 220 mA from 3.3-V supply and occupies 3.96 mm² silicon area. A two-channel radar platform based on full-custom TRXs and PLL was fabricated to demonstrate high-precision and high-resolution FMCW sensing. The radar enables up to 10-GHz frequency ramp generation in 74-84-GHz range, which results in 1.5-cm spatial resolution. Due to high output power, thus high signal-to-noise ratio (SNR), a ranging precision of 7.5 μm for a target at 2 m was achieved. The proposed architecture supports scalable multichannel applications for automotive FMCW using a single local oscillator (LO).

This paper presents two D-band frequency quadruplers (FQs) employing different circuit techniques. First FQ is a 129–171-GHz stacked Gilbert-cell multiplier using a bootstrapping technique, which improves the bandwidth and the conversion gain with respect to the conventional topology. Stacked architecture enables current reuse for the second frequency doubler resulting in a compact and energy-efficient design. The circuit reaches 3-dB bandwidth of 42 GHz, which is the highest among similar reported quadruplers. It achieves 2.2-dBm saturated output power, 5-dB peak conversion gain, and 1.7% peak DC-to-RF efficiency. The stacked FQ occupies 0.08 mm ² and consumes 22.7 mA from 4.4-V supply. Second presented circuit is a transformer-based injection-locked FQ (T-ILFQ) employing an E-band push–push voltage-controlled oscillator (PP-VCO). The VCO is a self-buffered common-collector Colpitts oscillator with a transformer formed on emitter inductors. Proposed configuration does not reduce the tuning range of the VCO, thus providing wide locking range and high sensitivity with respect to the injected signal. The T-ILFQ achieves 21.1% locking range, which is the highest among other reported injection-locked frequency multipliers. The peak output power is −4 dBm and the input sensitivity reaches −22 dBm. The circuit occupies 0.09 mm ² and consumes 14.8 mA from 3.3-V supply.

In this paper we model phase noise and spurious tones (spurs) for a fractional-N phase-locked loop (PLL) with static phase offset. The phase detector (PD) input-output characteristic around the bias point is approximated by a parabolic function. Using a MATLAB code, phase noise spectrum and fractional spurs are calculated as a function of slope and curvature of the PD characteristic. The dependence of the PLL output spectrum on PD nonlinearity and rms phase error at the PD input is discussed and compared with theoretical results. A close agreement with theoretical predictions is observed.