Aurelio Mannara

In this paper, we compare quantitatively the results obtained from the numerical simulation of current transport in polysilicon-channel MOSFETs under different modeling assumptions typically adopted to reproduce the basic physics of the devices, including the effective medium approximation and the description of polysilicon as the haphazard ensemble of monocrystalline silicon grains separated by highly defective grain boundaries. In the latter case, both pure drift-diffusion transport and a mix of intra-grain drift-diffusion and inter-grain thermionic emission are considered. Interest is focused on cylindrical nanowire and macaroni gate-all-around structures, due to their relevance in the field of 3-Dimensional NAND Flash memories, focusing not only on the average behavior but also on the variability in the electrical characteristics of the devices.

This paper investigates the temperature dependence of random telegraph noise (RTN) in 3-D NAND Flash technologies. Experimental results on memory arrays reveal an increase of RTN when temperature is reduced, which is mainly attributed to the growth of the amplitude of the fluctuations arising from RTN traps. A direct proof of this growth is provided by directly monitoring some RTN waveforms arising from single traps in cells out of either memory arrays or test elements. In order to explain this evidence, the TCAD model for polysilicon NAND strings presented in Part I of this paper is adopted and extended to address the amplitude of the threshold-voltage shift coming from the trapping of a single electron at different positions in cell channel. Numerical results successfully reproduce the experimental trends with temperature and allow to explain them in terms of stronger nonuniformities in polysilicon inversion when temperature decreases. In particular, the reduction of temperature makes the string current more controlled by the polysilicon grain boundaries, increasing, in turn, the amplitude of the RTN fluctuations arising from traps placed on or close to them.

This paper presents characterization and modeling results exploring the temperature dependence of the electrical characteristics of 3-D NAND Flash strings. Experimental data over a wide temperature range are used to calibrate a Technology Computer-Aided Design model for current transport through the polysilicon channel of the strings, which is then used to investigate the role of grain boundaries on string conduction. Results reveal that the variability in the grain configuration in the strings introduces a nonnegligible statistical spread in the temperature dependence of the threshold voltage (VT) of the memory cells, which acts as a broadening contribution to the array VT distribution when temperature is changed. The experimental and modeling activities will be extended in Part II of this paper to explore the temperature dependence of the VT instability caused by random telegraph noise.