Juan Manuel Carrillo

This work presents the realization of a compact and embedded impedance-based sensor system for the characterization of lithium-ion batteries by means of electrical impedance spectroscopy (EIS). The analog magnitude-ratio and phase-difference detection (MRPDD) method is implemented and extended through a generalized formulation that models the shunt element as a frequency-dependent impedance and compensates the parasitic contributions of the printed circuit board. This reformulation corrects magnitude and phase errors introduced by the measurement hardware without increasing the overall complexity. The prototype comprises two main functional blocks: current-mode excitation and voltage-mode measurement. The excitation stage uses an operational transconductance amplifier and a power MOSFET to generate a voltage-controlled current source, whereas the sinusoidal voltage signal is generated by means of a direct digital synthesizer. The measurement chain relies on differential acquisition using instrumentation amplifiers and analog magnitude/phase detection based on the AD8302 vector detector under microcontroller control. The proposed method has been first validated by simulations using both a linear RC equivalent model and an extended Randles-type battery-equivalent model, and then experimentally characterized using a linear RC equivalent model of the device under test. Measurements show that the generalized formulation recovers the ideal impedance response in the presence of parasitic effects, both in the shunt device and in the printed circuit board. In the experimental validation with the RC model, a magnitude error of 1.65% is obtained at 1 kHz, which is adopted as the upper frequency limit for battery characterization, even though operation up to 10 kHz is possible. Phase measurements revealed that the input capacitive coupling of the vector detector, conceived for operation in the RF range, requires an adaptation for appropriate operation in the intended frequency range. The prototype has been also applied to the characterization of a commercial lithium-ion 18650 cell, enabling the measurement of battery impedance and the analysis of its dependence on the state-of-charge and on the discharge current.

Power Management Units (PMU) are present in most electronic devices today. However, for power and area constrained applications, their design becomes a real challenge, especially when cell-sized autonomous microsystems are targeted. This paper presents an LDO regulator and a voltage reference, which are usually a must in any PMU, for autonomous microsystems fabricated in 65 nm CMOS technology. This PMU has been designed to minimize quiescent power and area, consuming a minimum power of 15.6 nW and occupying only 391 $\mu m^2$ , while being able to deliver up to 40 $\mu A$ to the load. No significant degradation was observed, as the measured line regulation is 0.173%/V, the temperature coefficient is 128.4 ppm/ $^\circ$ C over a very wide temperature range going from 0 $^\circ$ C up to 120 $^\circ$ C, and the PSR at low frequencies is $-$ 67.1 dB.

This paper explores the feasibility of a capacitor-less (CL) low-dropout (LDO) regulator to operate efficiently in a low-voltage environment. The CL-LDO scheme selected is based on a unity-gain feedback configuration around the error amplifier (EA), so that the inclusion of high-value on-chip resistors is avoided and different key parameters, such as the power supply rejection or the noise, are optimized. A comparative analysis has been carried out over the same LDO structure including a bulk-driven and a gate-driven EA, respectively. The pass branch of the voltage regulator is provided with pseudo-class-AB operation, in order to lead to a very small quiescent current in the standby operation mode, whereas a very large current can be delivered to the load when required. Both regulators were designed and fabricated in 180 nm CMOS technology to operate with a maximum supply voltage of 1.8 V. The extensive experimental characterization showed that the bulk-driven LDO can achieve a significantly lower minimum supply voltage, i.e., 0.6 V, as compared to the gate-driven counterpart, 1 V, under the same reference voltage and load current conditions.

An instrumentation amplifier (IA), aimed at wideband bioimpedance analysis in the low‐voltage low‐power scenario of internet of medical things (IoMT), is presented. The operation principle is based on the indirect current feedback technique, where an input and a feedback transconductor determine the voltage gain of the preamplifier. The required transconductors consist of two bulk‐driven flipped‐voltage‐follower cells and an active pseudo‐resistor, thus leading to a linear and compact implementation. The circuit has been designed and fabricated in 180 nm CMOS technology to operate with a 0.6‐V supply. Experimental results obtained from measurements on eight samples of the silicon prototype show that when the IA is programmed to have a nominal voltage gain of 11 V/V, the bandwidth is 316.2 kHz, the CMRR exceeds 63 dB, and the maximum output voltage that can be processed with a THD below –40 dB is 555 mV .

A bandpass filter (BPF), with high quality factor ( Q ) and wide tuning range of the centre frequency ( $f_0$ ), for signal separation in simultaneous multi-sine bioimpedance analysis, is presented. The cell follows the $G_m$ - C approach, where a multiple-output transconductor has been incorporated, for the sake of compactness, and a fully-differential structure has been selected, to enhance the general performance of the solution. The linearized transconductors ( $G_m$ ) are based on a double asymmetric differential pair and the integrated capacitors ( C ) are implemented in such a way that the required transfer function for the differential-mode signal is achieved and the stability of the common-mode component is granted. The BPF has been designed and fabricated in 180 nm CMOS technology to operate with a 1.8-V supply and feature a nominal gain at $f_0$ of 0 dB and a Q equal to 20, whereas $f_0$ is programmed by modifying the biasing current of the transconductors. Experimental results, measured on 8 samples of the silicon prototype, show that the BPF centre frequency can be continuously swept from 102 Hz to 2.06 MHz with a supply current ranging between 981 nA and 686 $\mu$ A. Besides, the maximum output voltage range of the filter, determined according to the –40 dB THD criterion, varies between around 31.5 mV and 64 mV within the frequency range indicated, thus leading to a dynamic range between 42.3 dB and 48.6 dB, which illustrates its suitability for the target application.

Two techniques to design a low-transconductance (G m ) widely-tunable transconductor are described. The operation principle consists in both cases in the subtraction of two nominally equal transconductances, one of which can be electronically tuned. The circuit implementation differs, being one solution based on the use of source followers (SF), a linearization resistor, and a tunable current mirror, and consisting the other approach of differential pairs (DP) with resistive source degeneration, and an electronically programmable current biasing. Both transconductors have been designed in 180 nm CMOS technology to operate with 1.8 V. The SF and DP solutions achieve a minimum G m nominal value of 1.38 nA/V and 6.03 nA/V, respectively, with a simulated transconductance tuning range of 729.6× and 7129.4×, also respectively, obtained from a Montecarlo analysis. The application of the transconductors to the design of a second-order G m − C bandpass filter for signals separation in multi-sine bioimpedance spectroscopy is also addressed.