Jong Keuk Park

Transition metal‐based conductive‐bridge RAM offers superior non‐volatility and stable low‐resistance states in the MΩ resistance range compared to noble metal (Ag, Cu) counterparts; however, achieving stable multi‐level operation with low read noise under low‐current conditions remains a critical challenge. This study reports a dual‐material engineering strategy altering filament transport by combining a Ru–Pt alloy electrode with an AlO _x switching layer. Pt incorporation suppresses excessive Ru ion injection, while the low‐defect‐density AlO _x matrix stabilizes filament evolution, leading to a nanocluster‐based conductive pathway rather than a continuous metallic filament. Temperature‐dependent electrical measurements reveal thermally activated hopping conduction (Ea ∼0.44 eV), and current–voltage analysis indicates hopping distances of 1.0–1.9 nm across resistance states, confirming gradual inter‐cluster spacing modulation. This filament structure enables 16 distinct conductance states with reduced read noise over TaO _x ‐ and HfO _x ‐based devices. Incorporated into a convolutional spiking neural network framework, the device achieves 80.97% FMNIST inference accuracy (post‐training quantization only) and ultralow inference energy of 0.817 pJ/inference in the FC layer—roughly three orders of magnitude lower than Ag‐ and Cu‐based ECM systems. These results establish a direct link between materials design, filament physics, and system‐level performance, highlighting dual‐material engineering as a pathway toward energy‐efficient, high‐density analog synaptic devices.

The cross‐sectional and planar microstructures of a cubic boron nitride (cBN) thin film with a ‐preferential orientation are observed using transmission electron microscopy. The cBN films are deposited by unbalanced magnetron sputtering under the condition that oxygen is added to a 20 sccm Ar–N₂(25%) gas mixture. Thecross‐sectional view of the cBN film deposited with the addition of 0.4 sccm of oxygen shows a dual‐phase structure: turbostratic boron nitride (tBN) layers are filled between cBN columns, and the planar view shows that cBN crystals were surrounded by a tBN matrix. The films deposited under less than 0.4 sccm of oxygen addition show a single‐phase structure with no tBN layers between the cBN columns. The difference between dual‐ and single‐phase structures is that they have preferred and orientations. This texture variation is interpreted as being due to the low residual stress of the dual‐phase‐structured cBN film and the low surface energy of the cBN (111) plane. The residual stress of the dual‐phase structure is significantly lower than that of the single‐phase structure. This is attributed to the compressive residual stress relieved by the tBN layers formed between the cBN columns.

Recently, many large-scale neuromorphic systems that emulate spiking neural networks have been presented. Biological evidence emphasizes the importance of the log-normal distribution of biological neural and synaptic parameters in the brain; however, this fact is easily ignored sometimes, and the parameters are excessively optimized to scale up a system. This is because high-precision parameters require floating-point arithmetic $-$ an operation known to consume high-energy and result in a high implementation cost in digital hardware. In this study, we propose a novel neuron implementation model that enhances neural and synaptic dynamics using the time-embedded floating-point arithmetic for better biological plausibility and low-power consumption. The proposed algorithm enables sharing temporal information with a membrane potential by time-embedded floating-point arithmetic, thus minimizing the memory usage of the neural state. In addition, this method need not access the static random-access memory at every time step, thus reducing the dynamic power consumption, even with a floating-point precision neural and synaptic dynamics. Using the proposed model, we implemented a core group with a total of 8,192 neurons on a field-programmable gate array device, Xilinx XC7K160T. The core group is designed for use in large-scale neuromorphic systems. We tested the neuron model in a core under various experimental conditions.

Neuromorphic hardware is a system with massive potential to enable efficient computing by mimicking the human brain. The novel system processes information using neuron spikes (Action Potentials) and the synaptic connections between neurons are trained using biologically plausible methods like spike-timing-dependent plasticity (STDP). Memristor is one of the promising candidates to implement such neuromorphic hardware. Two types of memristors, diffusive and drift, have been proposed to form a synapse showing faithful emulation of STDP, where the diffusion effect is used to trace the spike timing history crucial for STDP and the drift memristor keeps the weight information in a longer time scale. The purpose of this paper is to systematically investigate STDP characteristics in such a synapse with serially connected two memristors using SPICE models. The results show that STDP properties are strongly dependent on device parameters and even the shape of STDP curves is modified. Different shapes of the STDP curve were identified. The results and analysis could support the design of emerging device-based synapses, which can faithfully mimic biological STDP characteristics for future neuromorphic systems.