Şemsettin Altındal

In the present study, both metal/semiconductor (MS) and metal/polymer/semiconductor (MPS) Schottky Diodes (SDs) were grown onto the same n-Si wafer to compare their electrical and optical characteristics. Firstly, ZnO and CeO₂ nanostructures were synthesized by ultrasonic-assisted method (UAM), and structurally characterized by utilizing x-ray diffraction (XRD), Ultraviolet-visible spectroscopy (UV–vis), and Fourier-Transform-IR (FTIR) methods. The mean submicron crystallite sizes were estimated to be below 11.39 nm for CeO₂ and 54.37 nm for ZnO nanostructures through the Debye–Scherrer method. The optical bandgap was calculated as 3.84 eV for CeO₂ and 3.88 eV for ZnO nanostructures via Tauc plot. Electrical parameters such as reverse-saturation current (Io), ideality-factor (n), zero-bias barrier height (Φ_Bo), and rectification-ratio (RR) were found as 0.596 μA, 5.45, 0.64 eV, 2.74 × 10⁵ in dark and 5.54 μA, 5.88, 0.59 eV, 8.60 × 10³ under illumination for the MS SD and 0.027 μA, 4.36, 0.72 eV, 1.85 × 10⁷ in dark and 0.714 μA, 5.18, 0.64 eV, 7.61 × 10⁴ under illumination for the MPS SD, respectively. The energy-dependent profile of surface-states was obtained via the Card-Rhoderick method, by considering Φ_B(V) and n. RR of the MPS SD is almost sixty-seven times the RR of the MS SD in the dark. The sensitivity of the MPS SD (=710) is nineteen and five-tenths the sensitivity of the MS SD (=36.4), so the MPS SD is considerably more sensitive to illumination. These results indicate that the (ZnO:CeO₂:PVP) organic interlayer significantly improves the performance of the MS SD.

SiO₂ surfactant insulator into Al/n-Si metal-semiconductor (MS) structure was fabricated into Al/SiO₂-surfactant/n-Si metal–insulator–semiconductor (MIS) structure and its effect on the electrical properties of the final structure was investigated. The SiO₂-surfactant layer is coated on the n-Si wafer by the spin coating technique. The I-V data is used to calculate the fundamental electrical parameters of this MIS structure. The density distribution of the surface states (N_ss) is computed depending on the energy at forward potential. The current conduction mechanisms (CCMs) in the MIS structure are examined at the reverse and forward biases applied. To get more accurate and reliable results, the profiles of I-V and C/(G/ω)-V are measured at a wide range of bias voltage (0.25V-4V) and frequency (1kHz-1MHz), respectively. The performance of the MIS is significant due to the basic values of electrical parameters (n, I₀, R_s, R_sh, N_ss, Φ_B0, and Rectifying Ration (RR)) and dielectric parameters (ε′, ε″, tan δ, M′, M″, R_s, and σ) compared with the MS structure. The other electrical parameters (N_D, W_D, E_m, Φ_Β) are extracted from the slope and intercept of the reverse bias C⁻²-V plot as a function of frequency. Furthermore, the profile of voltage-dependent R_s and N_ss was determined using different methods from I-V and C/G-V data and examined comparatively with each other. The changes in impedance properties with frequency and voltage of the MIS are discussed in detail.

In this study, an enhancement-mode (E-mode) GaN high electron mobility transistor (HEMT) with lateral tri-gate structure field effect transistor (FinFET) is proposed. To passivate the fin width, while keeping the normally-off performance of the FinFET intact, an ultrathin aluminium-oxide/sapphire (Al₂O₃) gate dielectric is proposed (in a basic single-finger 0.125 mm device). Later, the DC and radio frequency (RF) performances of the proposed FinFET designs (with optimized fin width and Al₂O₃ thickness) are compared with that of conventional planar HEMT. DC and RF measurements are performed using power transistors in ten-fingers configuration, with a total gate periphery of 2.5 mm. The effect of Fin structure and Al₂O₃ thickness on the electrical performance of HEMTs, including threshold voltage (V _th) shift, transconductance (g _m) linearity, small-signal gain, cut off frequency (f _t), output power (P _out), and power-added efficiency (PAE) are investigated. Based on our findings, FinFET configuration imposes normally-off functionality with a V th =  0 .2  V, while the planar architecture has a V th = − 3 .7  V. Originating from passivation property of the alumina layer, the FinFET design exhibits two orders of magnitude smaller drain and gate leakage currents compared to the planar case. Moreover, large signal RF measurements reveals an improved P _out density by over 50% compared to planar device, attributed to reduced thermal resistance in FinFETs stemming from additional lateral heat spreading of sidewall gates. Owing to its superior DC and RF performance, the proposed FinFET design with ultrathin gate dielectric could bear the potential of reliable operating for microwave power applications, by further scaling of the gate length.

The objective of this study is to investigate the effect of (Al 2 O 3- PVP) on the electrical characteristics in Al/p-Si (MS) and Al/(Al 2 O 3 -PVP)/p-Si (MPS) structures. At the first stage of this study, the preparation mechanism of A 2 O 3 nanostructures and its structural and morphological properties have been reported. Finally, the fabricated Schottky structures on the base of (Al 2 O 3 -PVP) nanocomposites have been reported. The forward and reverse bias I-V measurements at room temperature were also have been investigated and compared with each other to see the effect of organic interfacial layer on the main electrical characteristics.