Mathieu de Kruijf
Mathieu de Kruijf has a total of 23 co-authors. Here are the top co-authors by number of shared publications:
- Alberto Gomez-Saiz
Quantum Motion, London, UK
4 shared publications - Grayson M. Noah
Quantum Motion, London, UK
4 shared publications - Miguel Fernando Gonzalez-Zalba
Quantum Motion 9 Sterling Way N7 9HJ London United Kingdom
4 shared publications - John J. L. Morton
Quantum Motion 9 Sterling Way N7 9HJ London United Kingdom
3 shared publications - Thomas H. Swift
Quantum Motion, London, UK
2 shared publications - Andreas V. Kuhlmann
University of Basel
1 shared publication
Latest Publications
- Open Access
- 4 November 2026
- Published by Springer Nature in Nature Electronics
- p. 1-7
A nonlinear superinductor in a deep-submicrometre integrated circuit
- 4 November 2026
- Published by Springer Nature in Nature Electronics
- p. 1-7
Open AccessA nonlinear superinductor in a deep-submicrometre integrated circuit
- Top Cited PapersOpen Access
- 3 January 2025
- Published by Springer Nature in Nature Electronics
- Vol. 8 (1) , 75-83
Rapid cryogenic characterization of 1,024 integrated silicon quantum dot devices
As quantum processors grow in complexity, new challenges arise such as the management of device variability and the interface with supporting electronics. Spin qubits in silicon quantum dots can potentially address these challenges given their control fidelities and potential for compatibility with large-scale integration. Here we report the integration of 1,024 independent silicon quantum dot devices with on-chip digital and analogue electronics, all operating below 1 K. A high-frequency analogue multiplexer provides fast access to all devices with minimal electrical connections, allowing characteristic data across the quantum dot array to be acquired and analysed in under 10 min. This is achieved by leveraging radio-frequency reflectometry with state-of-the-art signal integrity, characterized by a typical signal-to-noise voltage ratio in excess of 75 for an integration time of 3.18 μs. We extract key quantum dot parameters by automated machine learning routines to assess quantum dot yield and understand the impact of device design. We find correlations between quantum dot parameters and room-temperature transistor behaviour that could be used as a proxy for in-line process monitoring.
- 3 January 2025
- Published by Springer Nature in Nature Electronics
- Vol. 8 (1) , 75-83
Top Cited PapersOpen AccessRapid cryogenic characterization of 1,024 integrated silicon quantum dot devices
As quantum processors grow in complexity, new challenges arise such as the management of device variability and the interface with supporting electronics. Spin qubits in silicon quantum dots can potentially address these challenges given their control fidelities and potential for compatibility with large-scale integration. Here we report the integration of 1,024 independent silicon quantum dot devices with on-chip digital and analogue electronics, all operating below 1 K. A high-frequency analogue multiplexer provides fast access to all devices with minimal electrical connections, allowing characteristic data across the quantum dot array to be acquired and analysed in under 10 min. This is achieved by leveraging radio-frequency reflectometry with state-of-the-art signal integrity, characterized by a typical signal-to-noise voltage ratio in excess of 75 for an integration time of 3.18 μs. We extract key quantum dot parameters by automated machine learning routines to assess quantum dot yield and understand the impact of device design. We find correlations between quantum dot parameters and room-temperature transistor behaviour that could be used as a proxy for in-line process monitoring.
- Top Cited PapersOpen Access
- 17 April 2024
- Published by AIP Publishing in Applied Physics Reviews
- Vol. 11 (2)
CMOS on-chip thermometry at deep cryogenic temperatures
Accurate on-chip temperature sensing is critical for the optimal performance of modern complementary metal-oxide-semiconductor (CMOS) integrated circuits (ICs), to understand and monitor localized heating around the chip during operation. The development of quantum computers has stimulated much interest in ICs operating at deep cryogenic temperatures (typically 0.01–4 K), in which the reduced thermal conductivity of silicon and silicon oxide and the limited cooling power budgets make local on-chip temperature sensing even more important. Here, we report four different methods for on-chip temperature measurements native to CMOS industrial fabrication processes. These include secondary and primary thermometry methods and cover conventional thermometry structures used at room temperature as well as methods exploiting phenomena that emerge at cryogenic temperatures, such as superconductivity and Coulomb blockade. We benchmark the sensitivity of the methods as a function of temperature and use them to measure local excess temperature produced by on-chip heating elements. Our results demonstrate thermometry methods that may be readily integrated in CMOS chips with operation from the millikelvin range to room temperature.
- 17 April 2024
- Published by AIP Publishing in Applied Physics Reviews
- Vol. 11 (2)
Top Cited PapersOpen AccessCMOS on-chip thermometry at deep cryogenic temperatures
Accurate on-chip temperature sensing is critical for the optimal performance of modern complementary metal-oxide-semiconductor (CMOS) integrated circuits (ICs), to understand and monitor localized heating around the chip during operation. The development of quantum computers has stimulated much interest in ICs operating at deep cryogenic temperatures (typically 0.01–4 K), in which the reduced thermal conductivity of silicon and silicon oxide and the limited cooling power budgets make local on-chip temperature sensing even more important. Here, we report four different methods for on-chip temperature measurements native to CMOS industrial fabrication processes. These include secondary and primary thermometry methods and cover conventional thermometry structures used at room temperature as well as methods exploiting phenomena that emerge at cryogenic temperatures, such as superconductivity and Coulomb blockade. We benchmark the sensitivity of the methods as a function of temperature and use them to measure local excess temperature produced by on-chip heating elements. Our results demonstrate thermometry methods that may be readily integrated in CMOS chips with operation from the millikelvin range to room temperature.
- Open Access
- 1 May 2023
- Published by AIP Publishing in Review of Scientific Instruments
- Vol. 94 (5)
A compact and versatile cryogenic probe station for quantum device testing
Fast feedback from cryogenic electrical characterization measurements is key for the development of scalable quantum computing technology. At room temperature, high-throughput device testing is accomplished with a probe-based solution, where electrical probes are repeatedly positioned onto devices for acquiring statistical data. In this work, we present a probe station that can be operated from room temperature down to below 2 K. Its small size makes it compatible with standard cryogenic measurement setups with a magnet. A large variety of electronic devices can be tested. Here, we demonstrate the performance of the prober by characterizing silicon fin field-effect transistors as a host for quantum dot spin qubits. Such a tool can massively accelerate the design–fabrication–measurement cycle and provide important feedback for process optimization toward building scalable quantum circuits.
- 1 May 2023
- Published by AIP Publishing in Review of Scientific Instruments
- Vol. 94 (5)
Open AccessA compact and versatile cryogenic probe station for quantum device testing
Fast feedback from cryogenic electrical characterization measurements is key for the development of scalable quantum computing technology. At room temperature, high-throughput device testing is accomplished with a probe-based solution, where electrical probes are repeatedly positioned onto devices for acquiring statistical data. In this work, we present a probe station that can be operated from room temperature down to below 2 K. Its small size makes it compatible with standard cryogenic measurement setups with a magnet. A large variety of electronic devices can be tested. Here, we demonstrate the performance of the prober by characterizing silicon fin field-effect transistors as a host for quantum dot spin qubits. Such a tool can massively accelerate the design–fabrication–measurement cycle and provide important feedback for process optimization toward building scalable quantum circuits.