Hui-Teng Yan

Robots are playing an important role in precision manufacturing and automated inspection, which places higher demands on the positioning accuracy. The Delta robot is the most widely used parallel robot with high speed and small cumulative error. In this way, improving the positioning accuracy of the Delta robot can expand its application scenarios. According to the parameter mapping relationship, the position error can be divided into geometric error and non-geometric error. Considering the influence of the orientation errors on the actual position of the robot end, an error model to recognize the geometric error is established, and the parameter identification is performed based on an iterative approach. For the non-geometric error, the 3D annular sector grid division method and the interpolation rule are established based on the error similarity. And then, a new error compensation method for Delta robots is proposed by combining geometric error modeling with spatial interpolating. After compensation, the positioning accuracy of the Delta robot is improved significantly. The maximum absolute positioning error of the robot is reduced by 86.08% from 2.084 mm to 0.290 mm, the average absolute positioning error of the robot is reduced by 81.77% from 0.790 mm to 0.144 mm, and the error trend in the workspace is eliminated, so as to enable the expansion of Delta robot applications.

Since high efficiency and low cost have become the leading trend of semiconductor packaging, dual-arms chips mounters have been widely used to eliminate the time delays and improve the efficiency. However, the auxiliary motion is required to avoid spatial interference, which increases the complexity of trajectory. In addition, the motion parameters need to be constantly adjusted online to balance the chips patch efficiency and operation stability. Whereas chips placement efficiency needs to online monitor, which is laborious, difficult to adjust the motion parameters rapidly. To off-line analyze the packaging efficiency, this paper establishes a calculation model for chips patch efficiency of dual-arms mounter, which accurately establish the quantitative relationship between motion parameters and efficiency, narrowing the selection range of motion parameters. Firstly, the process sequence of chips patch is constructed, and the efficiency calculation model is established. Secondly, considering the characteristics of the time-varying displacement, the method for solving the running time of each process under the flexible velocity control is proposed. Then, the chips patch efficiency is calculated for different parameters, and the effects of the motion parameters and the lead frame structures on chips patch efficiency are investigated, so as to optimize motion parameters. And simulation and calculation results of PTP motion are in good agreement with the experimental results, which provide an effective guidance for accurately calculating chips patch efficiency off-line and lays a foundation for selecting motion parameters.