Hsien-Yang Liu
Current Organizations / Institutes
The organizations/institutes from the scholar's latest article
Research Subjects
Hsien-Yang Liu has a total of 23 co-authors. Here are the top co-authors by number of shared publications:
- Tian-Li Wu
National yang Ming Chiao Tung University
4 shared publications Chen-Yu Yu
International College of Semiconductor Technology, National Yang Ming Chiao Tung University, Hsinchu, Taiwan
2 shared publicationsChiung-Yuan Lin
Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan
2 shared publicationsWei-Cheng Peng
International College of Semiconductor Technology, National Yang Ming Chiao Tung University, Hsinchu, Taiwan
2 shared publications- Cheng-En Tsai
Department of Electronics and Electrical Engineering and Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu 300, Taiwan
1 shared publication - Chih-Hung Chung
Department of Electronics and Electrical Engineering and Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu 300, Taiwan
1 shared publication
Latest Publications
- 1 November 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 73 (11) , 6675-6680
Novel Machine-Learning-Based Modeling of Ferroelectric Characteristics in Hafnium Zirconium Oxide-Based Devices Using P–E Curve Images via Dual Graph Attention Networks
- 1 November 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 73 (11) , 6675-6680
Novel Machine-Learning-Based Modeling of Ferroelectric Characteristics in Hafnium Zirconium Oxide-Based Devices Using P–E Curve Images via Dual Graph Attention Networks
- 12 December 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 73 (1) , 318-324
Impacts of Annealing Temperature on Performance and Reliability of Morphotropic Phase Boundary (MPB) in HZO
This work investigates the impact of annealing temperature on the performance and reliability of morphotropic phase boundary (MPB) Hf ${}_ {{0}.{25}}$ Zr ${}_ {{0}.{75}}$ O2 capacitors for DRAM applications. The films were deposited by atomic layer deposition (ALD) and capacitance-voltage ( $C$ – ${V}\text {)}$ measurements exhibited distinct asymmetric double peaks with a high dielectric constant (57) at $500~^{\circ }$ C annealing temperature. Grazing incidence x-ray diffraction (GIXRD) analysis confirmed that the high dielectric constant originates from a large T-phase fraction (64%) at this annealing temperature. Leakage current and time-dependent dielectric breakdown (TDDB) measurements reveal that the $500~^{\circ }$ C annealed sample achieves the best reliability, yielding a ten-year ${E}_{\text {TDDB}}~\approx ~2.68$ MV/cm at EOT = 6.1 Å while maintaining a very low leakage current density of $6.16\times 10^{-{9}}$ A/cm2 at 1 V. These results indicate that the increased T-phase ratio enhances both dielectric performance and TDDB reliability, which can be attributed to the larger oxygen vacancy diffusion barrier of the T-phase. The proposed MPB HZO structure, therefore, satisfies the voltage and leakage specifications for DRAM storage node capacitors under back end of line (BEOL)-compatible thermal budgets.
- 12 December 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 73 (1) , 318-324
Impacts of Annealing Temperature on Performance and Reliability of Morphotropic Phase Boundary (MPB) in HZO
This work investigates the impact of annealing temperature on the performance and reliability of morphotropic phase boundary (MPB) Hf ${}_ {{0}.{25}}$ Zr ${}_ {{0}.{75}}$ O2 capacitors for DRAM applications. The films were deposited by atomic layer deposition (ALD) and capacitance-voltage ( $C$ – ${V}\text {)}$ measurements exhibited distinct asymmetric double peaks with a high dielectric constant (57) at $500~^{\circ }$ C annealing temperature. Grazing incidence x-ray diffraction (GIXRD) analysis confirmed that the high dielectric constant originates from a large T-phase fraction (64%) at this annealing temperature. Leakage current and time-dependent dielectric breakdown (TDDB) measurements reveal that the $500~^{\circ }$ C annealed sample achieves the best reliability, yielding a ten-year ${E}_{\text {TDDB}}~\approx ~2.68$ MV/cm at EOT = 6.1 Å while maintaining a very low leakage current density of $6.16\times 10^{-{9}}$ A/cm2 at 1 V. These results indicate that the increased T-phase ratio enhances both dielectric performance and TDDB reliability, which can be attributed to the larger oxygen vacancy diffusion barrier of the T-phase. The proposed MPB HZO structure, therefore, satisfies the voltage and leakage specifications for DRAM storage node capacitors under back end of line (BEOL)-compatible thermal budgets.
- 3 June 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 72 (7) , 3582-3586
Novel Nondestructive Methodology Using PV Measurement With NLS-Based Analysis and GIXRD for Comprehensive O/T/M Phase Analyses in Ferroelectric HZO
This work demonstrates a novel nondestructive methodology combining a polarization-voltage (PV) measurement and grazing incidence X-ray diffraction (GIXRD) to comprehensively characterize the orthorhombic (O), tetragonal (T), and monoclinic (M) phases in ferroelectric (FE) HfZrO2 (HZO) films. The O/T phases are analyzed based on nucleation-limited switching (NLS) model with Weibull distribution to model antiferroelectric (AFE) polarization, while the M phase analysis employs a conventional GIXRD method. Results align with Monte Carlo simulations and Raman analysis, demonstrating consistency in phase percentages and PV characteristics. This approach offers an efficient and nondestructive methodology to analyze O/T/M phase percentages in FE materials and is very promising for FE technology.
- 3 June 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 72 (7) , 3582-3586
Novel Nondestructive Methodology Using PV Measurement With NLS-Based Analysis and GIXRD for Comprehensive O/T/M Phase Analyses in Ferroelectric HZO
This work demonstrates a novel nondestructive methodology combining a polarization-voltage (PV) measurement and grazing incidence X-ray diffraction (GIXRD) to comprehensively characterize the orthorhombic (O), tetragonal (T), and monoclinic (M) phases in ferroelectric (FE) HfZrO2 (HZO) films. The O/T phases are analyzed based on nucleation-limited switching (NLS) model with Weibull distribution to model antiferroelectric (AFE) polarization, while the M phase analysis employs a conventional GIXRD method. Results align with Monte Carlo simulations and Raman analysis, demonstrating consistency in phase percentages and PV characteristics. This approach offers an efficient and nondestructive methodology to analyze O/T/M phase percentages in FE materials and is very promising for FE technology.
- Open Access
Impact of Rh, Ru, and Pd Leads and Contact Topologies on Performance of WSe2 FETs: A First Comparative Ab Initio Study
2D field-effect transistors (FETs) fabricated with transition metal dichalcogenide (TMD) materials are a potential replacement for the silicon-based CMOS. However, the lack of advancement in p-type contact is also a key factor hindering TMD-based CMOS applications. The less investigated path towards improving electrical characteristics based on contact geometries with low contact resistance (RC) has also been established. Moreover, finding contact metals to reduce the RC is indeed one of the significant challenges in achieving the above goal. Our research provides the first comparative analysis of the three contact configurations for a WSe2 monolayer with different noble metals (Rh, Ru, and Pd) by employing ab initio density functional theory (DFT) and non-equilibrium Green’s function (NEGF) methods. From the perspective of the contact topologies, the RC and minimum subthreshold slope (SSMIN) of all the conventional edge contacts are outperformed by the novel non-van der Waals (vdW) sandwich contacts. These non-vdW sandwich contacts reveal that their RC values are below 50 Ω∙μm, attributed to the narrow Schottky barrier widths (SBWs) and low Schottky barrier heights (SBHs). Not only are the RC values dramatically reduced by such novel contacts, but the SSMIN values are lower than 68 mV/dec. The new proposal offers the lowest RC and SSMIN, irrespective of the contact metals. Further considering the metal leads, the WSe2/Rh FETs based on the non-vdW sandwich contacts show a meager RC value of 33 Ω∙μm and an exceptional SSMIN of 63 mV/dec. The two calculated results present the smallest-ever values reported in our study, indicating that the non-vdW sandwich contacts with Rh leads can attain the best-case scenario. In contrast, the symmetric convex edge contacts with Pd leads cause the worst-case degradation, yielding an RC value of 213 Ω∙μm and an SSMIN value of 95 mV/dec. While all the WSe2/Ru FETs exhibit medium performances, the minimal shift in the transfer curves is interestingly advantageous to the circuit operation. Conclusively, the low-RC performances and the desirable SSMIN values are a combination of the contact geometries and metal leads. This innovation, achieved through noble metal leads in conjunction with the novel contact configurations, paves the way for a TMD-based CMOS with ultra-low RC and rapid switching speeds.
Open AccessImpact of Rh, Ru, and Pd Leads and Contact Topologies on Performance of WSe2 FETs: A First Comparative Ab Initio Study
2D field-effect transistors (FETs) fabricated with transition metal dichalcogenide (TMD) materials are a potential replacement for the silicon-based CMOS. However, the lack of advancement in p-type contact is also a key factor hindering TMD-based CMOS applications. The less investigated path towards improving electrical characteristics based on contact geometries with low contact resistance (RC) has also been established. Moreover, finding contact metals to reduce the RC is indeed one of the significant challenges in achieving the above goal. Our research provides the first comparative analysis of the three contact configurations for a WSe2 monolayer with different noble metals (Rh, Ru, and Pd) by employing ab initio density functional theory (DFT) and non-equilibrium Green’s function (NEGF) methods. From the perspective of the contact topologies, the RC and minimum subthreshold slope (SSMIN) of all the conventional edge contacts are outperformed by the novel non-van der Waals (vdW) sandwich contacts. These non-vdW sandwich contacts reveal that their RC values are below 50 Ω∙μm, attributed to the narrow Schottky barrier widths (SBWs) and low Schottky barrier heights (SBHs). Not only are the RC values dramatically reduced by such novel contacts, but the SSMIN values are lower than 68 mV/dec. The new proposal offers the lowest RC and SSMIN, irrespective of the contact metals. Further considering the metal leads, the WSe2/Rh FETs based on the non-vdW sandwich contacts show a meager RC value of 33 Ω∙μm and an exceptional SSMIN of 63 mV/dec. The two calculated results present the smallest-ever values reported in our study, indicating that the non-vdW sandwich contacts with Rh leads can attain the best-case scenario. In contrast, the symmetric convex edge contacts with Pd leads cause the worst-case degradation, yielding an RC value of 213 Ω∙μm and an SSMIN value of 95 mV/dec. While all the WSe2/Ru FETs exhibit medium performances, the minimal shift in the transfer curves is interestingly advantageous to the circuit operation. Conclusively, the low-RC performances and the desirable SSMIN values are a combination of the contact geometries and metal leads. This innovation, achieved through noble metal leads in conjunction with the novel contact configurations, paves the way for a TMD-based CMOS with ultra-low RC and rapid switching speeds.
- Open Access
- 19 July 2023
- Published by MDPI AG in Nanomaterials
- Vol. 13 (14) , 2104
Comprehensive Investigation of Constant Voltage Stress Time-Dependent Breakdown and Cycle-to-Breakdown Reliability in Y-Doped and Si-Doped HfO2 Metal-Ferroelectric-Metal Memory
In this study, we comprehensively investigate the constant voltage stress (CVS) time-dependent breakdown and cycle-to-breakdown while considering metal-ferroelectric-metal (MFM) memory, which has distinct domain sizes induced by different doping species, i.e., Yttrium (Y) (Sample A) and Silicon (Si) (Sample B). Firstly, Y-doped and Si-doped HfO2 MFM devices exhibit domain sizes of 5.64 nm and 12.47 nm, respectively. Secondly, Si-doped HfO2 MFM devices (Sample B) have better CVS time-dependent breakdown and cycle-to-breakdown stability than Y-doped HfO2 MFM devices (Sample A). Therefore, a larger domain size showing higher extrapolated voltage under CVS time-dependent breakdown and cycle-to-breakdown evaluations was observed, indicating that the domain size crucially impacts the stability of MFM memory.
- 19 July 2023
- Published by MDPI AG in Nanomaterials
- Vol. 13 (14) , 2104
Open AccessComprehensive Investigation of Constant Voltage Stress Time-Dependent Breakdown and Cycle-to-Breakdown Reliability in Y-Doped and Si-Doped HfO2 Metal-Ferroelectric-Metal Memory
In this study, we comprehensively investigate the constant voltage stress (CVS) time-dependent breakdown and cycle-to-breakdown while considering metal-ferroelectric-metal (MFM) memory, which has distinct domain sizes induced by different doping species, i.e., Yttrium (Y) (Sample A) and Silicon (Si) (Sample B). Firstly, Y-doped and Si-doped HfO2 MFM devices exhibit domain sizes of 5.64 nm and 12.47 nm, respectively. Secondly, Si-doped HfO2 MFM devices (Sample B) have better CVS time-dependent breakdown and cycle-to-breakdown stability than Y-doped HfO2 MFM devices (Sample A). Therefore, a larger domain size showing higher extrapolated voltage under CVS time-dependent breakdown and cycle-to-breakdown evaluations was observed, indicating that the domain size crucially impacts the stability of MFM memory.