Ryan Jiang
Research Subjects
Ryan Jiang has a total of 5 co-authors. Here are the top co-authors by number of shared publications:
- Chieh-Chen Ker
National yang Ming Chiao Tung University
1 shared publication Chun-Chi Wang
Department of Analog and Memory Circuit Design, Elan Microelectronics Corporation, Hsinchu, Taiwan
1 shared publication- Chun-Yu Lin
Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan
1 shared publication - Ming-Dou Ker
Institute of Electronics, National Yang Ming Chiao Tung University, Hsinchu, Taiwan
1 shared publication Tsung-Yin Chiang
Department of Analog and Memory Circuit Design, Elan Microelectronics Corporation, Hsinchu, Taiwan
1 shared publication
Latest Publications
- 5 December 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Device and Materials Reliability
- Vol. 26 (1) , 235-243
Cost-Efficient Bidirectional ESD Protection for 650-V GaN Power HEMT With Co-Packaged Transient Voltage Suppressor
A cost-efficient electrostatic discharge (ESD) protection solution for the gate-to-source terminal of GaN-based power high-electron-mobility transistors (HEMTs) is proposed. High ESD robustness of the GaN-based power HEMT has been successfully achieved by co-packaging a transient voltage suppressor (TVS) inside the package together, while a 32.6% reduction in cost as comparing to that with on-die bidirectional ESD protection circuit can be gained. Human-body-model (HBM) ESD level exceeding ±7 kV has been verified, indicating the effectiveness of the proposed solution for protecting the gate-to-source terminal of GaN-based power HEMT.
- 5 December 2025
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Device and Materials Reliability
- Vol. 26 (1) , 235-243
Cost-Efficient Bidirectional ESD Protection for 650-V GaN Power HEMT With Co-Packaged Transient Voltage Suppressor
A cost-efficient electrostatic discharge (ESD) protection solution for the gate-to-source terminal of GaN-based power high-electron-mobility transistors (HEMTs) is proposed. High ESD robustness of the GaN-based power HEMT has been successfully achieved by co-packaging a transient voltage suppressor (TVS) inside the package together, while a 32.6% reduction in cost as comparing to that with on-die bidirectional ESD protection circuit can be gained. Human-body-model (HBM) ESD level exceeding ±7 kV has been verified, indicating the effectiveness of the proposed solution for protecting the gate-to-source terminal of GaN-based power HEMT.