Gunter Fischer
Research Subjects
Gunter Fischer has a total of 41 co-authors. Here are the top co-authors by number of shared publications:
- Mohamed Hussein Eissa
IHP Leibniz-Institut fr innovative Mikroelektronik, Frankfurt (Oder), Germany
3 shared publications - Andrea Malignaggi
IHPLeibniz Institute for High Performance Microelectronics Frankfurt (Oder), Frankfurt, Germany
2 shared publications - Dietmar Kissinger
Ulm University
2 shared publications - Gerhard Kahmen
IHP Leibniz-Institut fr innovative Mikroelektronik Frankfurt (Oder), Frankfurt (Oder), Germany
2 shared publications A. Loose
Max Planck Institute for Solar System Research, Justus-von-Liebig Weg 3, Gttingen, 37077, Germany
1 shared publication- B. Tillack
Institute for Semiconductor Physics, Walter-Korsing-Strasse 2, 15230 Frankfurt (Oder), Germany
1 shared publication
Latest Publications
- 28 April 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Microwave Theory and Techniques
- Vol. 74 (6) , 4989-5003
Experimental Characterization of Millimeter-Wave SiGe-Integrated Avalanche Noise Sources for 4 K Cryogenic Applications
Avalanche driven diodes have been traditionally used as electrical noise generator due to their capability of generating broadband random noise. Currently, no solutions have been reported to generate avalanche noise at cryogenic temperatures. This work represents a step toward addressing this gap. For the first time, we present the full characterization of two millimeter-wave noise sources (NSs) operating at cryogenic temperatures: the first based on the base-collector diode of an heterojunction bipolar transistor (HBT) driven into avalanche, while the second based on a p-i-n diode integrating the bias circuitry and the output attenuator. Both devices, fabricated using two different 130-nm silicon-germanium (SiGe) BiCMOS process and assessed as NSs at room temperature (RT), have now been demonstrated to operate reliably and efficiently for physical temperatures as low as 4.3 K. Both devices are measured over a complete cooling cycle with mid temperature points (i.e., 300, 70, 4.3) during cooling and warming cycle, to assess that no hysteresis or memory effect are present in their behavior. The reported excess noise ratio (ENR) of the HBT-based diode shows a maximum variation of about 1 and 0.5 dB for 2 and 4 mA bias currents, respectively, in the range of 1–40 GHz. For the same biasing ranges, the p-i-n NS showed a maximum variation of 2 dB at 30 GHz (on-chip attenuator included) resulting in a temperature sensitivity of about −0.007 dB/K. The reported results highlights the capability of such devices to realize a new class of integrated high performance cryogenic sources, opening the possibility to integrated in situ cryogenic calibrations.
- 28 April 2026
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Microwave Theory and Techniques
- Vol. 74 (6) , 4989-5003
Experimental Characterization of Millimeter-Wave SiGe-Integrated Avalanche Noise Sources for 4 K Cryogenic Applications
Avalanche driven diodes have been traditionally used as electrical noise generator due to their capability of generating broadband random noise. Currently, no solutions have been reported to generate avalanche noise at cryogenic temperatures. This work represents a step toward addressing this gap. For the first time, we present the full characterization of two millimeter-wave noise sources (NSs) operating at cryogenic temperatures: the first based on the base-collector diode of an heterojunction bipolar transistor (HBT) driven into avalanche, while the second based on a p-i-n diode integrating the bias circuitry and the output attenuator. Both devices, fabricated using two different 130-nm silicon-germanium (SiGe) BiCMOS process and assessed as NSs at room temperature (RT), have now been demonstrated to operate reliably and efficiently for physical temperatures as low as 4.3 K. Both devices are measured over a complete cooling cycle with mid temperature points (i.e., 300, 70, 4.3) during cooling and warming cycle, to assess that no hysteresis or memory effect are present in their behavior. The reported excess noise ratio (ENR) of the HBT-based diode shows a maximum variation of about 1 and 0.5 dB for 2 and 4 mA bias currents, respectively, in the range of 1–40 GHz. For the same biasing ranges, the p-i-n NS showed a maximum variation of 2 dB at 30 GHz (on-chip attenuator included) resulting in a temperature sensitivity of about −0.007 dB/K. The reported results highlights the capability of such devices to realize a new class of integrated high performance cryogenic sources, opening the possibility to integrated in situ cryogenic calibrations.
- 14 April 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Microwave and Wireless Technology Letters
- Vol. 33 (6) , 923-926
A 27-mW Ka-Band Complex Dielectric Sensor Chip With Readout and Reference Circuits Using 1.2-V Supply in 130-nm SiGe BiCMOS
The capability to sense the dielectric properties of liquids and tissues is valuable in many applications, because accurate assessment of the material composition can be made from the complex permittivity measurements. Laboratory-on-chip systems for continuous dielectric monitoring impose low-voltage and low-power operation on the circuits to enable long-term use without battery replacement. In addition, high level of integration is necessary to facilitate the implementation of 2-D sensor arrays. This letter presents the design and characterization of a SiGe BiCMOS capacitive sensing oscillator-based complex dielectric sensor chip at Ka -band operating with a supply voltage of 1.2 and consuming 27 . The chip is integrated with readout circuits to provide simple dc outputs for easier processing and with reference circuits to serve as a tool to compensate for both the external and internal variations, which affect the sensor output. The experimental results show that different alcohols can be differentiated using the proposed sensor chip.
- 14 April 2023
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Microwave and Wireless Technology Letters
- Vol. 33 (6) , 923-926
A 27-mW Ka-Band Complex Dielectric Sensor Chip With Readout and Reference Circuits Using 1.2-V Supply in 130-nm SiGe BiCMOS
The capability to sense the dielectric properties of liquids and tissues is valuable in many applications, because accurate assessment of the material composition can be made from the complex permittivity measurements. Laboratory-on-chip systems for continuous dielectric monitoring impose low-voltage and low-power operation on the circuits to enable long-term use without battery replacement. In addition, high level of integration is necessary to facilitate the implementation of 2-D sensor arrays. This letter presents the design and characterization of a SiGe BiCMOS capacitive sensing oscillator-based complex dielectric sensor chip at Ka -band operating with a supply voltage of 1.2 and consuming 27 . The chip is integrated with readout circuits to provide simple dc outputs for easier processing and with reference circuits to serve as a tool to compensate for both the external and internal variations, which affect the sensor output. The experimental results show that different alcohols can be differentiated using the proposed sensor chip.
- 15 June 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Microwave and Wireless Components Letters
- Vol. 32 (11) , 1335-1338
220–320-GHz J-Band 4-Way Power Amplifier in Advanced 130-nm BiCMOS Technology
A power combined wideband power amplifier (PA) covering the$J$ -band (220–320 GHz) is presented in 130-nm BiCMOS technology. The input power is split by two cascaded 1-to-2 power splitters with amplification stages in-between. The four split signals drive four output stages, which have their outputs combined within a 4-way zero-degree combiner. The splitting and combining networks also incorporate impedance matching. After de-embedding the I/O pads and baluns of 2 dB loss at each side, the PA achieves a gain of 20 dB at the middle of the band and a minimum gain of 17 dB at 320 GHz with I/O return losses below$-$ 5 dB. The PA records a saturated output power ranging from 9.5 to 14.5 dBm across the$J$ -band. It consumes 710 mW from a 3 V supply which corresponds to a drain efficiency ($\eta_d$ ) of 3.15% at 270 GHz. The presented PA achieves twice better bandwidth with 1.5 times better$\eta_d$ than the state-of-the-art silicon-based amplifiers above 200 GHz. To the authors’ knowledge, this is the first PA covering the whole$J$ -band in silicon technologies.- 15 June 2022
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Microwave and Wireless Components Letters
- Vol. 32 (11) , 1335-1338
220–320-GHz J-Band 4-Way Power Amplifier in Advanced 130-nm BiCMOS Technology
A power combined wideband power amplifier (PA) covering the$J$ -band (220–320 GHz) is presented in 130-nm BiCMOS technology. The input power is split by two cascaded 1-to-2 power splitters with amplification stages in-between. The four split signals drive four output stages, which have their outputs combined within a 4-way zero-degree combiner. The splitting and combining networks also incorporate impedance matching. After de-embedding the I/O pads and baluns of 2 dB loss at each side, the PA achieves a gain of 20 dB at the middle of the band and a minimum gain of 17 dB at 320 GHz with I/O return losses below$-$ 5 dB. The PA records a saturated output power ranging from 9.5 to 14.5 dBm across the$J$ -band. It consumes 710 mW from a 3 V supply which corresponds to a drain efficiency ($\eta_d$ ) of 3.15% at 270 GHz. The presented PA achieves twice better bandwidth with 1.5 times better$\eta_d$ than the state-of-the-art silicon-based amplifiers above 200 GHz. To the authors’ knowledge, this is the first PA covering the whole$J$ -band in silicon technologies.- 27 September 2019
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Microwave Theory and Techniques
- Vol. 68 (1) , 239-251
Frequency Interleaving IF Transmitter and Receiver for 240-GHz Communication in SiGe:C BiCMOS
This article presents a fully integrated modular wideband frequency interleaving (FI) transmitter and receiver for high data rate communication applications. At the transmitter side, three independent in-phase and quadrature-phase (IQ) baseband channels are upconverted to different intermediate frequencies (IFs) and then interleaved. At the receiver side, the interleaved signals are downconverted and separated back to each independent channel. Single-ended inputs and outputs are utilized to reduce the pin count, for a more practical realization and higher potential toward future system scaling. Special design techniques are followed to minimize crosstalk and intermodulation products between the channels. All circuits are manufactured and measured in a 130-nm SiGe:C BiCMOS technology with fT,/,fmax,=,300/500 GHz. The FI transmitter achieves a channel bandwidth of 2.5 GHz with less than 3-dB difference across different channels until 15-GHz IF. It consumes 560 mW from 2.5 and 3.3 V supplies and occupies a silicon area of 1.9 mm². The FI receiver achieves a baseband channel bandwidth of 2.5 GHz with a 1-dB difference between the channels until the same IF. It consumes 860 mW from 2.5 and 3.3 V supplies and has a chip area of 1.55 mm². The circuits are deployed in a communication experiment; first, in a back-to-back test with a direct cable connection, demonstrating a data rate of 15.6 Gb/s across the three IQ channels with a 16-QAM modulation scheme and a worst case transmitter-to-receiver error vector magnitude (EVM) of -18.6 dB. Then, a wireless experiment is performed with a 240-GHz front end with on-chip antenna, demonstrating a data rate of 7.8 Gb/s with QPSK modulation and a worst case EVM of -8.3 dB, across a wireless link of 15 cm. To the best of our knowledge, this is the first article that demonstrates a wireless transmission at sub-terahertz (sub-THz) carrier frequencies utilizing FI architectures.
- 27 September 2019
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Microwave Theory and Techniques
- Vol. 68 (1) , 239-251
Frequency Interleaving IF Transmitter and Receiver for 240-GHz Communication in SiGe:C BiCMOS
This article presents a fully integrated modular wideband frequency interleaving (FI) transmitter and receiver for high data rate communication applications. At the transmitter side, three independent in-phase and quadrature-phase (IQ) baseband channels are upconverted to different intermediate frequencies (IFs) and then interleaved. At the receiver side, the interleaved signals are downconverted and separated back to each independent channel. Single-ended inputs and outputs are utilized to reduce the pin count, for a more practical realization and higher potential toward future system scaling. Special design techniques are followed to minimize crosstalk and intermodulation products between the channels. All circuits are manufactured and measured in a 130-nm SiGe:C BiCMOS technology with fT,/,fmax,=,300/500 GHz. The FI transmitter achieves a channel bandwidth of 2.5 GHz with less than 3-dB difference across different channels until 15-GHz IF. It consumes 560 mW from 2.5 and 3.3 V supplies and occupies a silicon area of 1.9 mm². The FI receiver achieves a baseband channel bandwidth of 2.5 GHz with a 1-dB difference between the channels until the same IF. It consumes 860 mW from 2.5 and 3.3 V supplies and has a chip area of 1.55 mm². The circuits are deployed in a communication experiment; first, in a back-to-back test with a direct cable connection, demonstrating a data rate of 15.6 Gb/s across the three IQ channels with a 16-QAM modulation scheme and a worst case transmitter-to-receiver error vector magnitude (EVM) of -18.6 dB. Then, a wireless experiment is performed with a 240-GHz front end with on-chip antenna, demonstrating a data rate of 7.8 Gb/s with QPSK modulation and a worst case EVM of -8.3 dB, across a wireless link of 15 cm. To the best of our knowledge, this is the first article that demonstrates a wireless transmission at sub-terahertz (sub-THz) carrier frequencies utilizing FI architectures.
- 1 October 2018
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1-4
A Radiation Hardened 16 GS/s Arbitrary Waveform Generator IC for a Submillimeter Wave Chirp-Transform Spectrometer
This paper describes a radiation hardening design approach of a dual channel 16 GSps single chip arbitrary waveform generator (AWG) - a complex mixed-signal ASIC - that consists of a low phase noise 16 GHz PLL, two 1.6 Mbit SRAM blocks, two multiplexing chains, and two 4-bit DACs. The ASIC is dedicated to be a part of a submillimeter wave spectrometer that shall operate in deep-space environment. Under stringent power budget conditions, a selective radiation protection of the ASIC has been applied. The arbitrary waveform generator has been fabricated in a 130 nm SiGe BiCMOS process. Correct functionality has been verified in lab and will be further tested in an irradiation facility.
- 1 October 2018
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1-4
A Radiation Hardened 16 GS/s Arbitrary Waveform Generator IC for a Submillimeter Wave Chirp-Transform Spectrometer
This paper describes a radiation hardening design approach of a dual channel 16 GSps single chip arbitrary waveform generator (AWG) - a complex mixed-signal ASIC - that consists of a low phase noise 16 GHz PLL, two 1.6 Mbit SRAM blocks, two multiplexing chains, and two 4-bit DACs. The ASIC is dedicated to be a part of a submillimeter wave spectrometer that shall operate in deep-space environment. Under stringent power budget conditions, a selective radiation protection of the ASIC has been applied. The arbitrary waveform generator has been fabricated in a 130 nm SiGe BiCMOS process. Correct functionality has been verified in lab and will be further tested in an irradiation facility.
- 1 September 2010
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1-8
An impulse radio UWB transceiver with high-precision TOA measurement unit
This paper describes a monolithic integrated transceiver chipset intended for impulse radio (IR) Ultra-wide band (UWB) applications including indoor communication and indoor localization. The chipset operates in the higher UWB band centered at 7.68 GHz and it is optimized for a pulse bandwidth of about 1.5 GHz. The average pulse repetition rate of 60 MHz and an octagonal pulse position modulation (8-PPM) allow for raw data rates up to 180 MBit/sec. The available high bandwidth is used for precise indoor localization employing a dedicated time-of-arrival (TOA) measurement extension. This unit runs with an on-chip system clock of 3.84 GHz, which allows a measurement accuracy of 260 picoseconds. As demonstrated this UWB transceiver chipset is well suited for two-way ranging (TWR) in potentially harsh RF propagation environments. Under perfect line-of-sight conditions a spatial resolution of about 3.9 centimeter could be achieved.
- 1 September 2010
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1-8
An impulse radio UWB transceiver with high-precision TOA measurement unit
This paper describes a monolithic integrated transceiver chipset intended for impulse radio (IR) Ultra-wide band (UWB) applications including indoor communication and indoor localization. The chipset operates in the higher UWB band centered at 7.68 GHz and it is optimized for a pulse bandwidth of about 1.5 GHz. The average pulse repetition rate of 60 MHz and an octagonal pulse position modulation (8-PPM) allow for raw data rates up to 180 MBit/sec. The available high bandwidth is used for precise indoor localization employing a dedicated time-of-arrival (TOA) measurement extension. This unit runs with an on-chip system clock of 3.84 GHz, which allows a measurement accuracy of 260 picoseconds. As demonstrated this UWB transceiver chipset is well suited for two-way ranging (TWR) in potentially harsh RF propagation environments. Under perfect line-of-sight conditions a spatial resolution of about 3.9 centimeter could be achieved.
- 27 February 2009
- Published by Wiley
- p. 85-89
UWB Transceiver for Indoor Localization
- 1 September 2008
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 2 (21626588) , 59-62
Synchronisation performance of wireless sensor networks
Ultra Wideband (UWB) has been gaining growing research and industry interests in many different areas of wireless communications. Among them using UWB as a radio interface for wireless sensor network is of high interest due to its precise localisation and low power consuming capabilities. In this paper we carry out quantitative analysis into the synchronisation performance of UWB when it operates under usual wireless channel environments. Simulation results confirm that coherent receiver needs around 10 dB less signal to noise ratio to achieve synchronisation compared to the noncoherent detection. Higher spreading factors lead to noticeable improvement for both coherent and noncoherent detection.
- 1 September 2008
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 2 (21626588) , 59-62
Synchronisation performance of wireless sensor networks
Ultra Wideband (UWB) has been gaining growing research and industry interests in many different areas of wireless communications. Among them using UWB as a radio interface for wireless sensor network is of high interest due to its precise localisation and low power consuming capabilities. In this paper we carry out quantitative analysis into the synchronisation performance of UWB when it operates under usual wireless channel environments. Simulation results confirm that coherent receiver needs around 10 dB less signal to noise ratio to achieve synchronisation compared to the noncoherent detection. Higher spreading factors lead to noticeable improvement for both coherent and noncoherent detection.
- 1 January 1998
- Published by Springer Nature in MRS Proceedings
- Vol. 525
SiGe Heteroepitaxy for High Frequency Circuits
We have determined the process capability of Low Pressure (Rapid Thermal) Chemical Vapor Deposition (LP(RT)CVD) of epitaxial Si/SiGe/Si stacks for heterojunction bipolar transistors (HIBTs). The transistor parameters primarily influenced by the epitaxial characteristics were measured for 600 identically processed 4” wafers. The results demonstrate that it is possible to control accurately the epitaxial process for a 25 nm thick graded SiGe base profile with 20 % Ge and very narrow B doping (5 nm). The pipe limited device yield of about 90 % for an emitter area of 104μm2indicates a very low defect density in the epitaxial layer stack. The process capability indices determined from about 40,000 data points demonstrate the stability and capability of the LP(RT)CVD epitaxy with regard to manufacturing requirements.
- 1 January 1998
- Published by Springer Nature in MRS Proceedings
- Vol. 525
SiGe Heteroepitaxy for High Frequency Circuits
We have determined the process capability of Low Pressure (Rapid Thermal) Chemical Vapor Deposition (LP(RT)CVD) of epitaxial Si/SiGe/Si stacks for heterojunction bipolar transistors (HIBTs). The transistor parameters primarily influenced by the epitaxial characteristics were measured for 600 identically processed 4” wafers. The results demonstrate that it is possible to control accurately the epitaxial process for a 25 nm thick graded SiGe base profile with 20 % Ge and very narrow B doping (5 nm). The pipe limited device yield of about 90 % for an emitter area of 104μm2indicates a very low defect density in the epitaxial layer stack. The process capability indices determined from about 40,000 data points demonstrate the stability and capability of the LP(RT)CVD epitaxy with regard to manufacturing requirements.
- 1 May 1997
- Published by AIP Publishing in Journal of Applied Physics
- Vol. 81 (9) , 6134-6140
Comparison of the thermal stability of Si0.603Ge0.397/Si and Si0.597Ge0.391C0.012/Si superlattice structures
The annealing behavior of pseudomorphic Si Ge /Si and Si Ge C /Si superlattice structures was studied in the temperature range between 750 °C and 900 °C. Carbon incorporation of 1.2% changes the thermal stability of SiGe structures significantly. It suppresses plastic relaxation due to an effective dislocation pinning. No relaxation of the SiGeC sample was observed during annealing up to 875 °C for 3 h. For comparison the SiGe sample relaxed at 800 °C. Carbon strongly increases the interdiffusion of Ge and Si. The activation energy of this diffusion process for a Ge content of 40% decreases from about 4.8 eV for the pure SiGe to about 2.0 eV with an additional C content of 1.2% assuming a neglectable diffusion of the carbon. This leads to a distinct modification of the Ge profile in the investigated temperature range.- 1 May 1997
- Published by AIP Publishing in Journal of Applied Physics
- Vol. 81 (9) , 6134-6140
Comparison of the thermal stability of Si0.603Ge0.397/Si and Si0.597Ge0.391C0.012/Si superlattice structures
The annealing behavior of pseudomorphic Si Ge /Si and Si Ge C /Si superlattice structures was studied in the temperature range between 750 °C and 900 °C. Carbon incorporation of 1.2% changes the thermal stability of SiGe structures significantly. It suppresses plastic relaxation due to an effective dislocation pinning. No relaxation of the SiGeC sample was observed during annealing up to 875 °C for 3 h. For comparison the SiGe sample relaxed at 800 °C. Carbon strongly increases the interdiffusion of Ge and Si. The activation energy of this diffusion process for a Ge content of 40% decreases from about 4.8 eV for the pure SiGe to about 2.0 eV with an additional C content of 1.2% assuming a neglectable diffusion of the carbon. This leads to a distinct modification of the Ge profile in the investigated temperature range.