BGBogdan Govoreanu

Bogdan Govoreanu

*This is an algorithmically generated author record based on publicly available information.

Current Organizations / Institutes

The organizations/institutes from the scholar's latest article

Previous Organizations / Institutes

The organizations / institutes from the scholar's other articles in the past ten years


Bogdan Govoreanu has a total of 135 co-authors. Here are the top co-authors by number of shared publications:


Latest Publications

  • Open Access

    Advances in gate stack development for p-type 2D channel FETs through sacrificial WSe2 bilayer oxidation

    by Tien Dat Ngo, Goutham Arutchelvan, Sui-An Chou, Zaoyang Lin, Robert K. Grubbs, Souvik Ghosh, Daire Cott, Kaustuv Banerjee, Xiangyu Wu, Ming-Yang Li, et al.

  • Open Access

    Radiofrequency cascade readout of coupled spin qubits

    by Jacob F. Chittock-Wood, Ross C. C. Leon, Michael A. Fogarty, Tara Murphy, Felix-Ekkehard von Horstig, Sofia M. Patomäki, Giovanni A. Oakes, James Williams, Nathan Johnson, Julien Jussot, et al.

    Silicon spin qubits based on metal–oxide–semiconductor (MOS) technology are compatible with semiconductor manufacturing and offer a route to scalable quantum processing. However, spin readout typically relies on proximal charge sensors, which add architectural complexity and limit qubit connectivity. In situ dispersive readout techniques are more compact, which can alleviate these constrains, but exhibit limited sensitivity. Here we report a radiofrequency electron-cascade readout method that enhances the dispersive signal through alternating-current electron co-tunnelling. With this approach, we achieve an enhancement in signal-to-noise ratio of more than 35 dB, leading to a minimum integration time of 7.6 ± 0.2 µs. We demonstrate singlet-triplet readout of two-electron spins in a natural silicon planar MOS quantum dot array, and coherent spin control using the exchange interaction, which forms the basis for entangling gates. We find dephasing times of up to 500 ns and a gate quality factor that exceeds 10.


  • Controllable p-Type Doping of 2D WSe 2 pFET by Engineered Surface Charge Transfer Doping With Metal Co-Seeding

    by Tien Dat Ngo, Xiangyu Wu, Kaustuv Banerjee, Olivier Richard, César Javier Lockhart de la Rosa, Gouri Sankar Kar, Bogdan Govoreanu

    Surface charge transfer doping (SCTD) has emerged as a promising technique for doping 2D semiconductors, although it faces challenges in doping controllability, which impacts device performance. In this study, we introduce a novel approach to precisely control the p-type doping strength in solid-state SCTD for 2D WSe₂ field-effect transistors (FET) through metal co-seeding. By sequentially depositing molybdenum (Mo) and hafnium (Hf) metal seeds followed by O₂ annealing, we achieve improved doping control, while maintaining a high on/off current ratio. High-resolution transmission electron microscopy (HRTEM) images confirm the proposed co-seeding concept. This technique addresses doping controllability limitations in SCTD, enhances gate tunability, and it is viable for very-large-scale integration (VLSI) applications.


  • Top Cited Papers
    Open Access

    Low charge noise quantum dots with industrial CMOS manufacturing

    by A. Elsayed, M. M. K. Shehata, C. Godfrin, S. Kubicek, S. Massar, Y. Canvel, J. Jussot, G. Simion, M. Mongillo, D. Wan, et al.

    Silicon spin qubits are promising candidates for scalable quantum computers, due to their coherence and compatibility with CMOS technology. Advanced industrial processes ensure wafer-scale uniformity and high device yield, but traditional transistor processes cannot be directly transferred to qubit structures. To leverage the micro-electronics industry expertise, we customize a 300 mm wafer fabrication line for silicon MOS qubit integration. With careful optimization of the gate stack, we report uniform quantum dot operation at the Si/SiO2 interface at mK temperature. We measure a record-low average noise with a value of 0.61 $${\rm{\mu }}{\rm{eVH}}{{\rm{z}}}^{-0.5}$$ μ eVH z − 0.5 at 1 Hz and even below 0.1 $${\rm{\mu }}{\rm{eVH}}{{\rm{z}}}^{-0.5}$$ μ eVH z − 0.5 for some operating conditions. Statistical analysis of the charge noise measurements show that the noise source can be described by a two-level fluctuator model. This reproducible low noise level, in combination with uniform operation of our quantum dots, marks CMOS manufactured spin qubits as a mature platform towards scalable high-fidelity qubits.


  • Multiplexed superconducting qubit control at millikelvin temperatures with a low-power cryo-CMOS multiplexer

    by R. Acharya, S. Brebels, A. Grill, J. Verjauw, Ts. Ivanov, D. Perez Lozano, D. Wan, J. Van Damme, A. M. Vadiraj, M. Mongillo, et al.


  • Open Access

    Physics-Based and Closed-Form Model for Cryo-CMOS Subthreshold Swing

    by Arnout Beckers, Jakob Michl, Alexander Grill, Ben Kaczer, Marie Garcia Bardon, Bertrand Parvais, Bogdan Govoreanu, Kristiaan De Greve, Gaspard Hiblot, Geert Hellings

    Cryogenic semiconductor device models are essential in designing control systems for quantum devices and in benchmarking the benefits of cryogenic cooling for high-performance computing. In particular, the saturation of subthreshold swing due to band tails is an important phenomenon to include in low-temperature analytical MOSFET models as it predicts theoretical lower bounds on the leakage power and supply voltage in tailored cryogenic CMOS technologies with tuned threshold voltages. Previous physics-based modeling required to evaluate functions with no closed-form solutions, defeating the purpose of fast and efficient model evaluation. Thus far, only the empirically proposed expressions are in closed form. This article bridges this gap by deriving a physics-based and closed-form model for the full saturating trend of the subthreshold swing from room down to low temperature. The proposed model is compared against experimental data taken on some long and short devices from a commercial 28-nm bulk CMOS technology down to 4.2 K.

  • Physics-Based and Closed-Form Model for Cryo-CMOS Subthreshold Swing

    by Arnout Beckers, Jakob Michl, Alexander Grill, Ben Kaczer, Marie Garcia Bardon, Bertrand Parvais, Bogdan Govoreanu, Kristiaan De Greve, Gaspard Hiblot, Geert Hellings

    Cryogenic semiconductor device models are essential in designing control systems for quantum devices and in bench-marking the benefits of cryogenic cooling for high-performance computing. In particular, the saturation of subthreshold swing due to band tails is an important phenomenon to include in low temperature analytical MOSFET models as it predicts theoretical lower bounds on the leakage power and supply voltage in tailored cryogenic CMOS technologies with tuned threshold voltages. Previous physics-based modeling required to evaluate functions with no closed-form solutions, defeating the purpose of fast and efficient model evaluation. Thus far, only the empirically proposed expressions are in closed form. This article bridges this gap by deriving a physics-based and closed-form model for the full saturating trend of the subthreshold swing from room down to low temperature. The proposed model is compared against experimental data taken on some long and short devices from a commercial 28-nm bulk CMOS technology down to 4.2K


  • Modeling semiconductor spin qubits and their charge noise environment for quantum gate fidelity estimation

    by M. Mohamed El Kordy Shehata, George Simion, Ruoyu Li, Fahd A. Mohiyaddin, Danny Wan, Massimo Mongillo, Bogdan Govoreanu, Iuliana Radu, Kristiaan De Greve, Pol Van Dorpe

    The spin of an electron confined in semiconductor quantum dots is currently a promising candidate for quantum bit (qubit) implementations. Taking advantage of the existing CMOS integration technologies, such devices can offer a platform for large scale quantum computation. However, a quantum mechanical framework bridging a device's physical design and operational parameters to the qubit's energy space is lacking. Furthermore, the spin to charge coupling introduced by intrinsic or induced spin-orbit interaction (SOI) exposes the qubits to charge noise compromising their coherence properties and inducing quantum gate errors. We present here a comodeling framework for double quantum dot (DQD) devices and their charge noise environments. We use a combination of an electrostatic potential solver, full configuration interaction quantum mechanical methods, and two-level-fluctuator models to study the quantum gate performance in realistic device designs and operation conditions. We utilize the developed models together alongside the single electron solutions of the quantum dots to simulate one- and two-qubit gates in the presence of charge noise. We find an inverse correlation between quantum gate errors and quantum dot confinement frequencies. We calculate X-gate fidelities >97% in the simulated Si-MOS devices at a typical TLF density of 1011cm−2. We also find that exchange driven two-qubit SWAP gates show higher sensitivity to charge noise with fidelities down to 91% in the presence of the same density of TLFs. We further investigate the one- and two-qubit gate fidelities at different TLF densities. We find that given the small size of the quantum dots, sensitivity of a quantum gate to the distance between the noise sources and the quantum dot creates a strong variability in the quantum gate fidelities, which can compromise the device yields in scaled qubit technologies.


  • Scalable 1.4 μW cryo-CMOS SP4T multiplexer operating at 10 mK for high-fidelity superconducting qubit measurements

    by Rohith Acharya, Anton Potocnik, Steven Brebels, Alexander Grill, Jeroen Verjauw, Tsvetan Ivanov, Daniel Perez Lozano, Danny Wan, Fahd A. Mohiyaddin, Jacques Van Damme, et al.

    In this work, we report on the electrical performance of an ultra-low-power cryo-CMOS single-pole-4-throw (SP4T) RF multiplexer working at 10 mK base temperature stage of a dilution refrigerator. We use the multiplexer to benchmark a superconducting qubit for the very first time and obtain qubit coherence times of over 35 μs along with an average single-qubit gate fidelity of 99.93%, which exceeds the threshold required for quantum error-correction based on surface-code. This work demonstrates the operability of superconducting qubits with ultra-low-power cryo-CMOS devices at the base temperature, paving the way for advanced co-integration schemes.


  • A combinatorial study of SiGeAsTe thin films for application as an Ovonic threshold switch selector

    by Wouter Devulder, Daniele Garbin, Sergiu Clima, Gabriele Luca Donadio, Andrea Fantini, Bogdan Govoreanu, Christophe Detavernier, Larry Chen, Michael Miller, Ludovic Goux, et al.