Weisheng Wang

The paper demonstrates a GaN/Si hetero-structure integration of complementary logic inverter for power conversion, combining a GaN n-channel high-electron-mobility transistor (HEMT) and a Si p-channel metal-oxide-semiconductor field-effect transistor (MOSFET). The implementation of high-uniformity GaN HEMT by hydrogen treatment technology. The results show that n-FET and p-FET with the matched threshold voltage (n/p ratio = 1.7/–2.1 V), drain output current (139/–26 mA/mm) and on-state resistance (15.6/43.7 Ω∙mm). The complementary inverter (CL) achieves rail-to-rail output, low static current and fast switching performance (5 MHz). Enabled by a GaN/Si gate driver and a GaN power device of 5.6 A, the design further demonstrates 48-V-to-4.8-V floating buck conversion at MHz-level. This GaN-Si complementary circuit integration overcomes the limitations of single-material solutions for high switching frequency and high-power applications, validating its potential for future monolithic integration in power electronics.

This Letter presents tri-gate GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) with improved high-temperature performance for a monolithic integration platform, utilizing a low-damage digital recess technique. The fin structure followed by the multiple cycles of plasma oxidation and wet oxide removal process enables threshold voltage modulation from −9.1 V (D-mode) to +1.1 V (E-mode) in MIS-HEMTs, achieved by tuning the fin width between 800 and 56 nm on the same wafer. The E-mode device shows a low subthreshold swing of 76 mV/dec, a low on-resistance of 8.2 Ω·mm, and a low hysteresis of 26 mV. The E-mode device exhibits a small threshold voltage (Vth) shift of −0.13 V from room temperature up to 200 °C leading to logic inverters of stable characteristics with an inverter threshold voltage shift of only 0.16 V from 25 to 250 °C. These results validate the monolithic integration of tri-gate GaN to be promising for high-frequency and compact mixed-signal systems.

This article presents the enhancement-mode (E-mode) GaN p -channel heterojunction field-effect transistors ( p -FETs) with p -Al $_{\text{0.05}}$ Ga $_{\text{0.95}}$ N etching-target layer (ETL). The optimized high-selectivity etching technique achieves an etch rate of approximately 1 nm/min for p -GaN, while also generating a selectivity ratio of 4:1 between p -GaN and p -Al $_{\text{0.05}}$ Ga $_{\text{0.95}}$ N. High-yield E-mode p -FET with ETL has been obtained as the etching process window was expanded to 10 min. The devices achieved the characteristics of a threshold voltage ( $\textit{V}_{\text{th}}$ ) of $-$ 1.15 V and a maximum current density ( $\textit{I}_{\textit{D},\text{max}}$ ) of 6.16 mA/mm. Furthermore, the characteristics of multiple devices demonstrate the high consistency and reproducibility of p -FETs’ $\textit{V}_{\text{th}}$ and $\textit{I}_{\text{ON}}$ , thus providing significant opportunities for developing complementary circuit integration.

This article presents a monolithic integrated circuit (IC) platform based on the p-GaN gated HEMT technology with a hydrogen plasma treatment (H-treated) process. A 48 V DC-DC power conversion at a switching frequency of 1 MHz is realized. The peripheral enhancement/depletion (E/D-) mode devices formed circuit components, and monolithically integrated with the power device. This is the first H-treated p-GaN platform for the monolithic GaN mixed-signal power IC, the D-mode device will employ the H-treated p-GaN layer as the gate dielectric, with no additional insulator layer. The corresponding ASM-HEMT models have been calibrated for the computer-aided circuit design. Excellent agreement between simulation and static/dynamic experimental results have also been verified with inverters and comparators.

The article presents a monolithically integrated temperature sensor using a two-transistor (2 T) configuration based on gallium nitride (GaN) metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs). By adjusting the gate size ratio of the depletion-mode (D-mode) device and enhancement-mode (E-mode) device, the output type of the sensor can be converted from proportional to absolute temperature (PTAT) and complementary to absolute temperature (CTAT). Experimental results demonstrate that the 2 T configuration achieves PTAT/CTAT output with high temperature sensitivity (PTAT/CTAT: 15.86/ $-$ 10.53 mV/ $^\circ$ C) over a wide temperature range of 25 °C–250 °C and a broad supply voltage range of 8–60 V, attributed to the superior characteristics of the GaN transistor. In addition, the integrated over-temperature protection (OTP) block based on this temperature sensor has been fabricated in the laboratory, which features a fast response time (381 ns at 150 $^\circ$ C). These results demonstrate the viability of on-chip integrated sensors in OTP circuits that are fully compatible with 48 V applications and a high-temperature environment, paving the way for the development of high-power density all-GaN smart power systems.

In this work, we have demonstrated the Ni/Ag contacts on p-channel heterostructure field-effect transistors (p-HFETs) based on the p-GaN/AlGaN/GaN/Si platform. Using an optimal contact condition, where Ni/Ag (1/120 nm) was deposited and annealed at 550 $^{\circ}$ C for 180 s in O $_\text{2}$ ambient, a low contact resistance (27.44 $\Omega \cdot$ mm at 50 mA/mm) and a low Schottky barrier height (SBH) (0.479 eV) have been obtained. The p-HFETs with Ni/Ag contacts exhibit a very slight Schottky character, resulting in a satisfactory ON-resistance ( R $_{\biosc{on}}$ ) of 2.1 k $\Omega\cdot$ mm. Furthermore, the p-HFETs exhibit excellent electrical properties including a threshold voltage ( V $_{{\text{th}}}$ ) of $-{\text{1.91}}$ V, an ON-state current ( I $_{\biosc{on}}$ ) of 2.46 mA/mm, and an I $_{\biosc{on}}$ / I $_{\biosc{off}}$ ratio of ${\sim}$ 10 $^{\text{6}}$ . These results present a great potential of cost-effective Ni/Ag contacts on p-HFETs.