Xinyue Chang

Recent developments in system-on-wafer high-performance compute systems have delivered promising results for alleviating the memory wall encountered in AI/ML training workloads. This is achieved by integrating multiple XPUs on the same interposer substrate. It is expected that performance can scale further by replacing the electrical interface with an optical variant. In this paper, we study the thermal challenges this concept brings for Si photonic disk modulators, a key component of the optical transceiver. Because of the highly integrated nature of the system, thermal crosstalk is especially a concern, as well as heater efficiency for thermal tuning. Detailed, experimentally calibrated simulations reveal a loss of heater efficiency between 42–62% after hybrid bonding of the electrical IC (EIC) on the photonic IC (PIC). This loss can partially be offset by introducing a new thermal isolation feature called TOPCUT, which blocks vertical heat conduction and increases efficiency by 25%. Alternatively, co-design of the EIC back-end-of-line layers and the PIC layout to ensure low metal density directly above the device can be done to gain 12% heater efficiency. Thermal simulations of a fully populated interposer wafer reveal extremely low thermal crosstalk between tiles, but significant crosstalk inside a single tile. Studies predict a spatial gradient of 12 K/mm and temporal gradient of 1.78 K/ms in the PIC due to XPU power map.

In this paper, we introduce a modular thermal modeling methodology, BTE-FEM, that combines the Boltzmann Transport Equation (BTE) with Finite Element Modeling (FEM) for simulations of advanced back-end-of-line (BEOL) stacks with high accuracy and efficiency. BTE-FEM is validated against direct BTE-based simulations using simplified BEOL stack test cases across various technology nodes and via connectivity configurations. It is demonstrated that conventional FEM, using bulk material properties, increasingly underestimates the BEOL thermal resistance as the technology node scales. In contrast, the BTE-FEM developed in this study demonstrates good agreement with direct BTE simulations for all test cases, but at much shorter runtimes. The impact of material properties, metal densities, and boundary conditions on the derived BEOL thermal properties are benchmarked and the developed models are experimentally validated at two distinct technology nodes. Finally, the developed methodology is applied to a 12-layer, 18 nm metal pitch BEOL stack from an A10 high density core design, demonstrating its ability to simulate complex and realistic BEOL routings with the precision of direct BTE simulations while substantially reduced simulation time. This approach enables extensive Design of Experiments (DOE) for fast turnaround design iterations.