C. Dimri

The 22nm fully-depleted silicon-on-insulator (FDSOI) technology is considered near-ideal for creating low-power cryogenic control electronics, a key milestone in the pursuit of large-scale fault-tolerant quantum computers. However, it is essential to assess the device reliability under conditions of interest, as various gate stack reliability phenomena such as bias temperature instability (BTI) and hot carrier degradation (HCD) have been reported active at 4K. This study comprehensively analyzes the shift in device parameters induced by BTI stress and recovery from room temperature down to 4K. A new method of assessing the impact of cryogenic BTI on ultra-low-power applications is presented, showcasing how nMOS devices of the 22nm technology prove to be ready for long-term cryo-operation, whereas pMOS devices do not.

The realization of practical, large-scale quantum computers requires the optimization of classical electronics for cryogenic operation to solve the interconnect bottleneck between quantum processors and control electronics. Devices from Fully-depleted Silicon-on-insulator (FDSOI) technology nodes are ideal for cryogenic operation due to the possibility of tuning the threshold voltage through the back-gate and reducing power consumption. However, they must be assessed in terms of not just their performance but also their reliability at conditions of interest. In this study, we present the Bias Temperature Instability (BTI) characteristics of commercial 22 nm FDSOI transistors optimized for low-power applications at temperatures ranging from 300 K down to 4 K, focusing on the impact of stress time and gate overdrive voltage. We observe that BTI remains active in both pMOS and nMOS at 4K with weak dependencies on stress magnitude and duration. Crucially, recovery from threshold voltage shifts is also slowed down at cryogenic temperatures.